TS201 S/W exception interrupts


I am trying to enable software exception interrupts on a TS201 processor, without success.

I specifically want interrupts on floating-point errors (e.g. div-by-zero).

I enabled global interrupts, unmasked the bits in the XSTAT/YSTAT registers, and unmasked the bit in the SQCTL register, but my ISR is still never executes.

The following is an extract from my test code:

int swErrCnt = 0;

void SWerrorISR(int signal) { swErrCnt++; }

void TestSWinterrupt(void)
  __builtin_sysreg_write(__SQCTLST, 0x0004);  // Global interrupt enable  
  interrupt(SIGSW, SWerrorISR);  // Register interrupt handler
  //Unmask S/W interrupts:
  asm("R0 = STAT;;");
  asm("R1 = 0x700000;;"); //IVEN (invalid floating-point), OEN (overflow), UEN (underflow) 
  asm("R0 = R0 or R1;;");
  asm("STAT = R0;;");  
  __builtin_sysreg_write(__SQCTLST, SQCTL_SW);  // Unmask S/W exception interrupts in SQCTL register.
  // Force floating-point error
  volatile float aa = 1.0, bb = 0.0, cc;
  cc = aa/bb;  // Divide by zero
  printf("S/W IRQ count: %d", swErrCnt)

Any help will be appreciated!


Thinus Viljoen

  • 0
    •  Analog Employees 
    on Sep 30, 2019 11:05 AM


    Please find the attached assembly based example code. Can you please test the code and check whether it works as expected. Once it is verified, please use this as a reference and modify as per your requirement.

    Anand Selvaraj.

  • Hi Anand

    Thanks for the answer. I tried your code, and it does seem to work. One issue is that it executes the ISR in an infinite loop - perhaps there are IRQ-related bits that must be cleared in the ISR?

    In any case - I got the code in my original post to work, I just had to use the "signal()" function instead of the "interrupt()" function to register the ISR, i.e. from my original code snippet replace "interrupt(SIGSW, SWerrorISR);" by "signal(SIGFPE, SWerrorISR);". Use the same method to register ISRs for SIGSEGV, SIGILL, etc.

    I think I am going to use my code i.s.o. your assembly code - I a more confortable with c.

    Thanks for the help

    Thinus Viljoen