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The issue regarding the slave receiving DMA mode of ADSP1802

		
	
				

			

									
					    ChunkLi
					
							


			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Feb 26, 2025 
				
			
			
		
    
		
		                     
				
        		
    
		    
		    		    
    
		      		            		        
    Category: Software
    
    		        		            		    
    Product Number:  ADSP1802 
    
    		        		        		        
    Software Version: ADSP1802
    
    		    		    
    
		    		    
		    			
    
			    
    hello, 
    

      I configured the SPI of ADSP1802 as the Target receiving DMA mode. The Controller SPI continuously transmits data packets. When the interval between two data packets is less than 500MS, the data received in the SPI interrupt of ADSP1802 will be chaotic. When the interval between two packets is greater than 500MS, ADSP1802 can correctly receive each packet. Is this normal?
    

       In order to continuously receive data in the SPI interrupt, I carried out the following operations in the interrupt function. Is this operation reasonable?
    

    void SPI_Rx_Isr(int sig)
    

    {
    

     DEBUG_PRINT("spi rx:0x%x,0x%x, 0x%x, 0x%x, 0x%x,0x%x, 0x%x, 0x%x, 0x%x,0x%x\n",Destination,Destination[0],Destination[1],Destination[2],Destination[3],Destination[4],Destination[5],Destination[6],Destination[7],Destination[8]);
    

     
    

     *pSPICTLB &= ~SPIEN ;
    

     *pIISPIB = (unsigned int)Destination;
    

     *pIMSPIB = 1;
    

     *pCSPIB = M;
    

     
    

     *pSPICTLB |= SPIEN ;
    

     *pSPIDMACB = SPIDEN | SPIRCV |INTEN;
    

    }
    

    Is there any example of ADSP1802 being configured in SPI Target receiving DMA mode and continuously receiving data in interrupt?
    
			
    
			
									
		                             
                        

    
    
                                            
                 software
                
                                                    
                 ADSP1802
                
                                                    
                 DMA model
                
                                
            
    
    
    
		
    

				
				        
        		
    
			
						
									
												
			
			
                        
                                    
                        
                        
                        
            
			            
						
						
			
			
			
			
		
    

        
        
        
    
					
    
			
    


    
















    
	
    
	
    
					



			


				
	









	
      
	

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      •  Analog Employees  
      
            
						
                            
            
            				
            
                on Feb 28, 2025 8:16 AM
            
            
						
			            		
      
		
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      Hi Chunk,
      

      

      Please provide more information on below points to assist you better on this.
      

      1) Is it possible to explain your application with simple block diagram?
      

      2) Could you please share the SPI clock frequency you are using?
      

      3) Could you provide information about the SPI status and control registers?
      

      4) Please let us know the DMA mode you are using and provide the corresponding register configurations?
      

      

      Regards,
      

      Nandini C
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
				
						
				
				
		
		
      
			
		
      
	
      

      

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                on Mar 6, 2025 1:03 AM
            
            
												
						in reply to NandiniC
					
										
			            		
        
		
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        1.spi clock is 40MHz,spi receives as the slave.
        

        2.DMA mode is standard DMA,and Registers configuration as follow:
        

        void InitSpi(void)
        {
         adi_int_InstallHandler(ADI_CID_P18I,(ADI_INT_HANDLER_PTR)SPI_Rx_Isr,0,true);
        

        *pSPICTLB = 0;
        

        *pSPIFLGB = 0;
        

        *pSPIDMACB = 0;
        

        *pIISPIB = (unsigned int)Destination;
         *pIMSPIB = 1;
         *pCSPIB = M;
        

        *pSPICTLB = WL8 | TIMOD2 | SPIEN | MSBF ;
         *pSPIDMACB = SPIDEN | SPIRCV | INTEN;
        }
        
			
        

		
			
	      

		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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        •  Analog Employees  
        
            
						
                            
            
            				
            
                on Mar 19, 2025 9:38 AM
            
            
												
						in reply to elker_829238
					
										
			            		
        
		
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        Hi,
        

        Apologies for the delay.
        

        We require additional information to assist with the issue, as there are no available examples of the ADSP1802 configured in SPI receiving DMA mode while continuously receiving data in interrupt mode.
        

        In order to isolate the issue, we need to understand the system configuration. Could you please provide more details on the following points?
        

        1) Could you please provide a screenshot of the SPI and DMA registers from the register browser?
        2) Please verify the values of the SPI and DMA status registers and share them with us? This will help us check if any error flags are enabled that could be causing the issue.
        3) Can you please confirm whether the transmitter is properly sending the data?
        4) Is it possible to reduce the SPI clock speed and check if the issue still persists?
        5) We recommend avoiding repeatedly disabling and enabling the SPI and DMA within the interrupt to ensure proper operation.
        6) Could you please clarify what you mean by "the interval between two data packets"? How are you achieving or controlling this interval in your system?
        

        Regards,
        Nandini C
        
			
        

		
			
	      

		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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