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ADSP21593 - Core Target Select

Hi,

I am looking for the correct Core Target Select values für my dual core 21593. In the source control register: SEC_SCTL[n] Register Fields there is bit 24-27 to  specify to which core the input source interrupt should be directed to. But in Hardware Reference at page 6-59 new values are given. Can you please provide this information.

best tb

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  • Hi Anand, sorry but I do not understand ??? Please take a look in the HW-Reference-Manual as described above and you will not find the entry for bit 24-27. It is simply not described which bit pattern stand for what !!!!! tb

  • Hi tb,
    Thank you for pointing out this omission from the hardware manual, I'll get it updated for a future revision of the manual. The values to use are 1 for SHARC0 and 2 for SHARC1.

    The SEC service in CCES defines an enumeration and API for setting these. The ADI_SEC_CORE_ID enumeration defines the core targets and the API is adi_sec_SetCoreID(). For example:

    #include <services/int/adi_sec.h>
    #include <assert.h>

    int main(int argc, char *argv[]) {
       ADI_SEC_RESULT r;
       r = adi_sec_SetCoreID(SEC_SYS_SOFT0_INT, ADI_SEC_CORE_0);
       assert(r==ADI_SEC_SUCCESS);
       r = adi_sec_SetCoreID(SEC_SYS_SOFT1_INT, ADI_SEC_CORE_1);
       assert(r==ADI_SEC_SUCCESS);
    }

    Regards,
    Stuart.

  • Stuart, thanks a lot ! very helpful, but 4 bits for '1' and '2' ;);):) best thomas