ADAU1701 i2s Output from 2 Channel Input

Hello,

I am new with the SigmaDSP, but I am working on a project with a ADAU1701. The ADAU1701 getting a 2 Channel analog Input and for the project I need a i2s Output where the two channels (L/R) are transmitted over the i2c protocol.

In my simple Schematic, only the left channel is transmitted (obviously Slight smile).

In some examples, there used the "crossover" to split from i2s-Input to L/R Channel. Is there something similar, to create the L/R Data for the i2s output?

Thanks and greeting from Germany!

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  • +1
    •  Analog Employees 
    on Aug 30, 2021 3:19 PM

    Hello fmvoxa,

    Yes, Germany is a great place! I lived there for 2 years in Augsburg. It was a long time ago, 1977-1979 but I really enjoyed it. 

    Your term "crossover" is confusing. We do have crossover blocks used to split up the frequencies for a speaker crossover system but I think you are thinking of something different?

    I will attach an example project where it generates a stereo I2S signal and it receives a stereo I2S signal. You can jumper the serial output data port pin over to the serial input data port pin and then you can see both. The only issue is that our MINI eval board does not bring out the serial output data pin to a header or to anything else for that matter. It was a design oversight. But this program shows you how to do it.  

    ADAU1701 Digital Out with Digital In Loopback test.dspproj

    If you do want a speaker crossover I do have example projects for those. 

    Dave T

  • Hey Dave T, thanks for the replay!

    I am living in the north of germany ;)

    Your term "crossover" is confusing. We do have crossover blocks used to split up the frequencies for a speaker crossover system but I think you are thinking of something different?

    In this post (https://ez.analog.com/dsp/sigmadsp/f/q-a/106639/adau1701----output-a-copy-of-the-i2s-audio-input-to-an-i2s-output) he is using a crossover. First I was thinking it getting split, but the input is spit in the L/R Channel.

    ADAU1701 Digital Out with Digital In Loopback test.dspproj

    I tried this out, I hooked up a Logic analyzer on i2s. II use the ADAU1701 with 16 Bit word lenght as slave. It is working for the left Channel in the data stream.

    The right channel is still empty. It makes no difference whether the DIG1 is connected in the schematic or not.

    This is the output, when I use the ADAU1701 as Master and 24 Bit word length.

    MINI eval board

    I am using a freedsp classic board.

    You can jumper the serial output data port pin over to the serial input data port pin and then you can see both

    When I understand this correctly, I connec MP6 (SData_out0) to MP0 (SData_in0) with a jumper, just as LRCLK (MP10->MP4) and BCLK (MP11->MP6) . The ADAU1701 is in Master-Mode.

    But again, I only hear (see) only the left channel...

  • 0
    •  Analog Employees 
    on Aug 31, 2021 5:41 PM in reply to fmvoxa

    Hello fmvoxa,

    First I want to make sure you understand that the two channels will all come out of one SDATA pin. The first screenshot you showed only has left channel data but the data format is not I2S. Is the 1701 a clock master? 

    Take my program and run it with zero register changes. Then you will see I2S. I2S has 32 bit slots for the two channels with 24 bit data left justified with one bitclock delay of the data from the clock edge. When the LRCLK is low it is the left channel and when LRCLK is high it is the right channel. So start there. Then make changes to the format later. 

    This post of mine will show what it looks like on a scope. 

    (+) How to Take Meaningful Screenshots of I2S Audio Signals - Q&A - Audio - EngineerZone (analog.com)

    In your logic analyzer it is a bit more difficult to see if the signal is just a DC offset or if it is a proper level signal. You have to take several snapshots to see the number going up and down. 

    So what format do you want out of the part? 

    So my earlier question about if the 1701 is a clock master is important. 

    Dave T

  • First I want to make sure you understand that the two channels will all come out of one SDATA pin. The first screenshot you showed only has left channel data but the data format is not I2S.

    I know, this why there ist DIG0 and DIG1 in your example connected.

    Is the 1701 a clock master?

    For your example, yes.

    Take my program and run it with zero register changes. Then you will see I2S. I2S has 32 bit slots for the two channels with 24 bit data left justified with one bitclock delay of the data from the clock edge. When the LRCLK is low it is the left channel and when LRCLK is high it is the right channel. So start there. Then make changes to the format later. 

    Today I used only the jumper from the i2s output to the input of the ADAU1701 witout the logic-analyzer. Now there are the L- and R-channel filled with sounddata. When I connect the Logic-Analyzer again, I only hear the left-channel. But I don't care, because it is working now with my microcontroller.

    conclusion:

    First I wasn't using the DIG1 for the right-channel and second the logic-analyzer was doing some wired things.

    Thanks for the great help Dave T!

  • 0
    •  Analog Employees 
    on Sep 9, 2021 2:54 PM in reply to fmvoxa

    Hello fmvoxa,

    OK, Great. So it seems that the logic analyzer was loading down either the clocks or data? 

    So it is good that it is working. 

    Dave T

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