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How can I configure BF702 PA0x pins into pulling down state after a power on but before code execution begin?

smu
  •  Analog Employees 
on Dec 17, 2020

where can I  find the detailed configuration info.? thanks.

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    •  Analog Employees 
    on Dec 24, 2020 12:15 PM 2 months ago

    Hi,

    The GPIO’s will be tristated when both trstb and reset_b are low and the pull-up will come into picture once we are out of reset based on the conditions listed below.
    If output is disabled and if IE is high and PADS_PCFG0.PUE bit is zero , then pad will be tri-stated.
    If output is disabled and if IE is high and PADS_PCFG0.PUE bit is set , then pad will be pulled up.

    There is nothing we can do on chip to drive a low during the short period. You will have to manage the situation on the board.

    Regards,
    Anand Selvaraj.

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  • 0
    •  Analog Employees 
    on Dec 24, 2020 12:15 PM 2 months ago

    Hi,

    The GPIO’s will be tristated when both trstb and reset_b are low and the pull-up will come into picture once we are out of reset based on the conditions listed below.
    If output is disabled and if IE is high and PADS_PCFG0.PUE bit is zero , then pad will be tri-stated.
    If output is disabled and if IE is high and PADS_PCFG0.PUE bit is set , then pad will be pulled up.

    There is nothing we can do on chip to drive a low during the short period. You will have to manage the situation on the board.

    Regards,
    Anand Selvaraj.

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