Hi, i am reading about Multichannel mode of module SPORT of BF533 and i have some confuse about the transmit and receive clock signal of SPORT module.
First, as my understanding the TDM mode is same with I2S mode, the difference between them is: I2S only have two channels and TDM have more than two channels. In I2S mode, as i have read on wiki, the bit clock is calculated as below:
The bit clock pulses once for each discrete bit of data on the data lines. The bit clock frequency is the product of the sample rate, the number of bits per channel and the number of channels. So, for example, CD Audio with a sample frequency of 44.1 kHz, with 16 bits of precision and two channels (stereo) has a bit clock frequency of:
But with TDM mode, i have read that: data transmit cloc = frame synch clock * word lenght * number of channel
So this mean, frame synch clock alway equal with data same rate ?
Second, i have read the example of BF533 Ez Lite Kit board, which work with code AD1836 and in this example the frame synch and data clock is taken from the codec AD1836. So if i want to set frame synch and data clock is output from chip BF533, what i have to do ? Could you give me some example, which use the data clock and frame synch frome BF533 ?
Hello,Please refer the Frame Syncs in Multichannel Mode (PageNo:557 / 884) @ SPORT section in the HRM of ADSP-BF533,www.analog.com/.../ADSP-BF533_hwr_rev3.6.pdfAlso, We are attaching a simple SPORT code which is configured for internal clock and internal framesyc,this can be directly run on ADSP-BF533 EZ-kit.
Hi Anand Selvaraj,
Thank you so much for your example code. I am reading it. I have a question as below:
- With your example, when i load code to my BF533 EZ Lite board, what is the working frequency of the board ? Could you show me the frequency:
+ The system frequency ?
+ The core frequency ?
+ The frequency of frame synch of SPORT1 ?
+ The frequency of clock of SPORT1 ?
I know that i can calculate the frequency of SPORT1 (clock frequency and frame synch frequency) base on system frequency and the value in TCLKDIV and TFSDIV regisster. But when i read document, i feel it confused. So if could, please show the specific value of frequency when i use your example code.
P/S: with the question:
Thanh Nguyen said:So this mean, frame synch clock alway equal with data same rate ?
i have the answer that: normally, frame synch clock equal the data samples rate of codec.
Hello,We suggest you to refer the datasheet (PageNo:21/64) of ADSP-BF533.www.analog.com/.../ADSP-BF531_BF532_BF533.pdfRegards,Anand Selvaraj.