DM,PM and instruction

Hi,

I am using ADSP SC 589 processor.Since I am new to use the processor , I want to know what is difference between DM, PM and instruction memory?

What is the use of DM, PM and instruction cache?

Regards,

GBiswal

  • Hello,

    In SC58x processor, the processor core has two buses-PM data and DM data. The PM bus is used to fetch instructions from memory,but may also be used to fetch data. The DM bus can only be used to fetch data from memory. The data memory (DM) bus only carries data, the program memory (PM) bus handles both instructions and data, allowing dual-data accesses in a single cycle. For more information on L1 memory, could you please refer to the "L1 memory controller" chapter of Programming reference manual.

    The SHARC+ core supports code and data storage within itself (L1), on-chip memories outside core (L2) and external memories (L3) as well. Access to L1 memories takes a single cycle whereas access to external memories (L2 orL3) takes multiple cycles. The highest performance from the SHARC+ core is achieved when the code and data storage is in on-chip L1 memory. The SHARC+ core adds on-chip data and instruction caches (D-cache and I-cache respectively) to eliminate need for software controlled overlay-based data and code management.

    There are two data caches (D-cache) and one instruction cache (I-cache) per SHARC+ core. The data cache is shared with (and uses) block1 which caches all the external memory access requests from the DM bus. Similarly the other data cache is shared with (and uses) block2 which caches all external memory data access requests from the PM bus. Instruction cache is shared with (and uses) block3. The data cache used by the DM bus is referred to as DM cache and the data cache used by the PM bus is referred to as PM cache.
    For more information on could you please refer to the "L1 Cache controller" chapter of Programming reference manual.
    www.analog.com/.../SC58x-2158x-prm.pdf

    Regards,
    Lalitha.S