I use SPI0 (slave) with non-DMA.
The settings are as follows.
- SPI0_CTL.SIZE = 2(32bit word)
- SPI0_CTL.SIZE = 1(Enable)
- SPI0_TXCTL.TDU = 1(Send zeros when SPI_TFIFO is empty)
I want to output data in synchronization with the clock from the master after writing to the TFIFO register (SPI0_TFIFO).
However, the data is actually output in the later word.
I have a question.
TFIFO is described in the Hardware Reference Manual that there are two 32-bit word sizes.
I understand that this has a total size of 64 bits.
If TXCTL.TDU = 1, does Zero perform 64bit write to TFIFO regardless of CTL.SIZE?
(If SIZE is set to 32 bits, will 0 data be output twice?)
If the answer to question 1 is YES, is there a way to clear only 32 bits?