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Permitted Clock Frequencies

Thread Summary

The user inquires about the maximum core clock frequency for different Blackfin+ processors, noting discrepancies between the datasheet and ordering guide. The support engineer confirms that the 'Processor Instruction Rate (Max)' in the ordering guide corresponds to the maximum fCCLK in Table 17 of the datasheet. For the ADSP-BF700KCPZ-1 and ADSP-BF702KCPZ-3, the user should configure the CGU registers according to the 'Ratio Restriction' in Table 17 to ensure compliance with the maximum instruction rate.
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Category: Datasheet/Specs
Product Number: ADSP-BF700

Hi,

The Blackfin+ datasheet does not have any derivative dependent clock specifications  (tables 17,18,19,28), however in the ordering guide there are different "Processor Instruction Rate (max)" values.

I would assume that these instruction rates relate at least to maximum allowable core clock frequencies, but that contradicts the specification tables (especially table 17) which do not destingush between the different processors.

So, if I use a Blackfin+ with SYS_CLKIN = 40MHz this will result in 120MHz coreclock after reset, if I understand the default/reset settings of the GCU registers correctly. Is that a valid setting for a BF700?

What restrictions apply to the clocks for those processors that cannot use a max instruction rate of 400MHz?

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