Debugging Memory on Blackfin with external or dma modifications

I am debugging an fpga memory connected to the 16bit  async bank1 of the adsp-bf523 blackfin processor.

The memory is written in the fpga continuously with 16bit  values.

When debugging the memory address with the  expressions window, the is a fault that the value reading is not  correct.

When debugging with the Blackfin memory window the values  are valid.

It looks like the expression window is  accessing in byte sequences, because there are always the upper 8bit and  the lower 8bit valid,

but not the whole 16bit.

This Problem occurs also if debugging internal memory that is written by 16bit dma. expressions window fault and memory window is valid

  • Hi,

    Could you try enabling the option "Do single byte memory access" in the 'Settings:Target Options' menu, and let me know if the problem still occurs in the Expressions window?

    Note that this may make loading your DXE slow if there are large buffers, etc, so you may want to only enable this option once you have loaded the DXE to your target.

    thanks,
    Craig.

  • Hi,
        there is no difference if turning this option on or  off.
    regards
    Bernhard
  • Hi Bernhard,

    is there a simple parallel connection through the ASYNC bus to the memory of the FPGA, or is it connected in a non conventional way, such as SPI, PPI, etc?

    When you say that the upper and lower 8 bits are valid, but not the whole 16-bits, do you mean that the value looks as though one byte has been read before the FPGA memory has been written, and the other 8bytes read after the FPGA memory is written?

    Are you reading large amounts of data (e.g. does the memory window cover a large range of addresses, or are there a number of expressions being evaluated in the Expressions Window) when you are attempting to read the memory?

    Am I correct in assuming that you are not halting the DMA when you are debugging the memory contents?

    regards,

    Craig.

  • Hi Craig,

    here the answers:

    is there a  simple parallel connection through the ASYNC bus to the memory of the  FPGA, or is it connected in a non conventional way, such as SPI, PPI,  etc?

    -> There is a simple parallel connection through the ASYNC bus

    When  you say that the upper and lower 8 bits are valid, but not the whole  16-bits, do you mean that the value looks as though one byte has been  read before the FPGA memory has been written, and the other 8bytes read  after the FPGA memory is written?

    -> Yes

    Are you reading large amounts of data (e.g.  does the memory window cover a large range of addresses, or are there a  number of expressions being evaluated in the Expressions Window) when  you are attempting to read the memory?

    -> I have tried to only show the expressions window with only one 16bit value and the problem exists too.

    Am I correct in assuming that you  are not halting the DMA when you are debugging the memory contents?

    -> Yes

    regards,

    Bernhard

  • Hi Bernhard,

    I think this issue would be best dealt with via private support, as it appears it will require more in depth debugging. Can you please contact us via the link below, and include a link to this forum topic.

    http://www.analog.com/processors/support

    regards,

    Craig.