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too high "low" voltage level on GPIO

Thread Summary

The user encountered an issue with the ADF4002 not properly latching via SPI1 on the EZKIT LITE 506F due to PG1 not going below 440 mV. The problem was resolved by setting DIP switch #4 (SW5, SWT018) to the 'off' position.
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Hi,

I am trying to control ADF4002 by using EZKIT LITE 506F SPI1 controller and by using PG1 as latch enable.

For some unclear reason, when the PG1 is cleared, it does not go below 440 mV which causes improper SPI latch enable.

The code is attached. Is there something wrong in the initializations?

#include <cdefBF506F.h>
void delay(int d){
int i;
for (i=0;i<d;i++);
}
       
char spi_4002[] = {0x1f,0x82,0x83, // init latch
                                 0x1f,0x82,0x82, // function latch
                                 0x00,0x02,0x31, // N counter
                                 0x00,0x00,0x08};// R counter
int main( void )
{
short i,j;

// setup SPI & PG1 as latch enable

*pPORTG_FER = ~PG1;// Port G enable - PG1 GPIO
*pPORTGIO_DIR = PG1; // set PG1 direction to output
*pPORTG_MUX = 0xFF3F; // Port G SPI1 clk and mosi
*pSPI1_BAUD = 300;    // Set Baud rate
*pSPI1_CTL  = TDBR_CORE | MSTR | SPE  ;
asm("ssync;");

// transmit AD4002 setup
for (j=0;j<4;j++){
      *pPORTGIO_CLEAR = PG1;// ADF4002 LE active (low)
      for (i=0;i<3;i++){
          *pSPI1_TDBR = (short)spi_4002[j*3+i];// transmit  byte
           asm("ssync;");
           while(!( *pSPI1_STAT & SPIF)){} // poll SPIF
          delay(300);
       }
       *pPORTGIO_SET = PG1;// ADF4002 LE high
        delay(40000);// to make about 1.5 ms between words
}
}