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Range of PWM Duty Cycle on BF50x



		

			

									
						mauri1106
					
							

			
				
									
											
							 		
		        	            							
			
			    	
			                    
                
				                on Jan 25, 2011 
				
			
			
		


				
		

		    		    
		    
		    	
			
Hello.

 
Reading the HW reference manual (rev 0.2) of the BF50x, I've found this phrase (page 14-15 or page 555 of the pdf document) about PWM duty cycle:

 
"Each duty cycle register range is from (–PWMTM/2 – PWMDT) to (+PWMTM/2 + PWMDT), which, by definition, is scaled such that a value of 0 represents a 50% PWM duty cycle."

 
This little confuse me because I understand that, in single-update mode, I can vary duty cycle from 50% to 100%: but if I need the whole range from 0% to 100%, how can I do?

 
In my application I have to drive an H-Bridge and I need to change each branch in the whole range from 0% to 100% and I would use (if possible) the single-update mode.

 
Thanks a lot for your help

 
Maurizio

								


				
				
		

			
						
									
									
						
						
			
			
			
			
		


					

			





	

		
	











	

	

					



			


				
	









	
    
	

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                                 Analog Employees 
                                
                            
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                on Jan 31, 2011 5:31 AM
            
            
					
    
	
    

		
		
    
					
    HI Maurizio,
    
 
    As explained in HRM, the ‘PWM Channel Duty Control’ register holds two’s complement value of the Duty cycle.
    
 
    To understand this, consider an application (having SCLK = 100MHz) which generates PWM signal of 500 KHz.
    
 
    The switching frequency of PWM patterns is calculated as: PWM_TM = (100x10^6)/(2*500x10^3) = 100.
    
 
     So, the valid range for Duty Cycle Control register becomes (assuming zero dead time requirement):  -50(0xFFCE) <= PWM_CHA <= 50 (0x0032)
    
 
    …specifying -50 generates 0% duty cycle; 0 generates 50%; & 50 generates 100% duty cycle.
    
 
    So, Duty control register with –ve values, generates PWM waveforms of less than 50% duty cycle. HRM explains this clearly. Not sure whether you have any confusion any over specific information in it. Let me know if you have any questions.
    
 
    Best Regards,
    
 
    Prashant
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
				
						
						
				
				
		
		
    
			
		
    
	
    

    

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                on Jan 31, 2011 12:16 PM
            
            
					
    
	
    

		
		
    
					
    Hi Prashant,
    
 
    thank you very much for your well explanation. I thought that the value for PWM_CHx, was intended as unsigned, and this fact was at the beginning of my misunderstanding.
    
 
    Sorry for this!
    
 
    Thanks again
    
 
    Maurizio
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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