BF527 Multi-cycle Instructions and Latencies. any document?


i'm doing some research to evaluate the BF-527. I already did some code evaluating the performance, but not i'm looking for the details what intructions are available and how long they take.

i was looking for the Instruction Set document on the main site. and I found two interesting documents: EE-197 and EE-171 (both are "Multi-cycle Instructions and latencies").

at first I thought EE-197 is correct for all the BlackFin cores. but then i got EE-171 and fount several differences.

e.g. in BF531,532,533 : "32-bit by 32-bit integer multiply" takes 3 cycles, but Conditional branch - 1 or 5 or 9 cycles (up to prediction and outcome),

and in BF535:               "32-bit by 32-bit integer multiply" takes 5 cycles, but Conditional branch - 1 or 4 or 7 cycles (up to prediction and outcome).

so i got a questions:

1) what are the Latencies for BF-527 ? is there any document for BF-52x ? (i couldn't find them)

2) can anybody tell me (or guide to any datasheet) what the pipeline difference is between BF-535 and BF-531,532,533? so they have this difference in latencies?

Thanks in advance for your answer.

regards, Dmitry K.