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ADSP BF531 Boot from external SPI IC in master mode!

Category: Hardware
Product Number: ADSP BF531

Hi all, 

I have a broblem about adsp bf531 boot, in my board, adsp conect to at45db081e dataflash, i am using logic brobe to check startup sequence, i see SPI memory detection rouutine is ok, after that, DSP send opcode 0xE8 (  Continuous Array Read), after that on MOSI  send  16 byte 0x00, and MISO 16 byte 0xFF then CS change 0 to 1 and stop . No anything happen. Can you tell me what happen? and how to fix its! thank a lot

  • hi, thank for your support, i was read that thread, but i cant solve my broblem cuz my DSP was send data to SPI chip,after check memory finish, no operation happen ( in picture attach) , can you check it

  • Hello, thank you for your reply!
    I have read those articles, my problem is that the DSP has sent information to the SPI chip, has checked the memory, but after that there is no information exchange, the program has been loaded into the SPI chip but not read. out, specifically as shown in the photo I attached, can you help me?

  • Hi,

    Could you please check and confirm the what is your page size? We recommended to config the page size (“Power of 2” binary page size (256 bytes))


  • i using 264 bytes size, i dont k now why cpu stop after some byte was read! i was check in hex file from spi rom, may be have a lot of byte data iss 0xFF. this is old design, i need to fix it, i think program cannot start cuz boot fail! but i dont know why boot rom can not be read to DSP!

  • Hi,

    In AT45DB081,there are three user configurable page size.
    1.By default 264 Bytes per page
    2.256 bytes per page
    3.Page size can be factory pre-configured for 256 Bytes.

    More recent Blackfin boot kernels (those embedded on ADSP-BF51x, ADSP-BF50x, ADSP-BF592, ADSP-BF52x and ADSP-BF54x processors) no longer have special support for DataFlash memories.
    Instead, it is assumed that all customers are using the 'D' Family of devices and have the option to let the part operate in power-of-2 mode(256 bytes per page).

    If the flash chip has been configured for 264 bytes per page(default), SPI Flash will not be able to communicate with the Processor.Both the SPI flash and Blackfin SPI(DSP) can be configured to power-of-2 mode (256 bytes per page).

    By default, the Buffer and page size configuration commands (DataFlash Page size (264 bytes) is Byte1(3Dh),Byte2(2Ah),Byte3(80h) and Byte4(47h).
    Can you please change this command to "Power of 2" binary page size(256 bytes).Please follow the below instructions

    From the datasheet, you need to configure the device for writing to the page size configuration register( Power of 2 bonary page size (256 byte), a 4-byte opcode sequence of 3Dh,2Ah,80h and
    A6h must be clocked into the device.After the last bit of the opcode sequence has been clocked in the CS pin must be deasserted to initiate the internally self-timed configuration process and nonvolatile register program cycle.
    It is a non-volatile bit.The device does not need to be power cycled after the completion of the configuration process and register program cycle in order for the buffer and page size to be configured to 256 bytes