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BF506F UART example - error handling doesn't work

Hallo,

I'm working on ADSP-BF506F ver 0.0 EZ-Kit and UART echo example (VisualDSP++ 5.0 Update 10). I want to test the driver robustness and trying to catch any line failures. Using command pair  {ADI_UART_CMD_SET_LINE_STATUS_EVENTS, (void *)TRUE} and transmitting chars from the PC to the board with faulty baudrate will provide unexpected neverending loop. When I enable deferred callbacks, line status isn't handled anymore. The functionality of handling line status of the driver is completely different in comparison with ADSP-BF533 - where is line status handling safe.

Thanks a lot, Zdenek

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  • Hi Zdenek,

        Thank you very much for reporting the issue to us. We are able to reproduce the issue with the modified example that you have attached. After looking at the driver code we have identified a bug in interrupt handler which handles line status errors. The interrupt handler is not clearing the bits in the line status register which is causing the interrupt to be re-issued.

         The bits in the line status register were read-to-clear in the BF533 processor. But they are changed to write-to-clear in case of BF506 processor. So the driver works correctly in case of BF533 and not on BF506.

         We will fix this issue in the upcoming update of VisualDSP++ 5.0. As a workaround please copy the attached file (adi_uart.c) to

    <Visual DSP Installation Dir>/Blackfin/lib/src/drivers/uart and add the adi_uart_int.c and adi_uart_dma.c files to your project.  The adi_uart_int.c and adi_uart_dma.c files can be found under the directory  <Visual DSP Installation Dir>/Blackfin/lib/src/drivers/uart.

    Thanks,

    Murali

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  • Hi Zdenek,

        Thank you very much for reporting the issue to us. We are able to reproduce the issue with the modified example that you have attached. After looking at the driver code we have identified a bug in interrupt handler which handles line status errors. The interrupt handler is not clearing the bits in the line status register which is causing the interrupt to be re-issued.

         The bits in the line status register were read-to-clear in the BF533 processor. But they are changed to write-to-clear in case of BF506 processor. So the driver works correctly in case of BF533 and not on BF506.

         We will fix this issue in the upcoming update of VisualDSP++ 5.0. As a workaround please copy the attached file (adi_uart.c) to

    <Visual DSP Installation Dir>/Blackfin/lib/src/drivers/uart and add the adi_uart_int.c and adi_uart_dma.c files to your project.  The adi_uart_int.c and adi_uart_dma.c files can be found under the directory  <Visual DSP Installation Dir>/Blackfin/lib/src/drivers/uart.

    Thanks,

    Murali

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