Could you give advice or share link to doc, regarding memory/system bandwith (L1,L2,DDR) in case of system with:
-duplex eppi (RX/TX buffers),
-duplex sport2sport communication (to second processor 2TX/2RX buffers)
-sport2DAC/ADC (2RX/2TX buffers) simultaneous communication.
As per now system I have, works fine only with 2 of them (eppi with sport2DAC/ADC, or eppi with sport2sport for example) when I include third one system is unstable and sport2sport transmission hang.
Hi,Please refer the ADSP-BF548 documents from following ADSP-BF548 webpage, www.analog.com/.../adsp-bf548.htmlPlease elaborate your query more with detailed high level bock diagram. Can you make sure that you are following the limitations of Clock and Timings for the Core, System and Peripherals as specified by the datasheet.www.analog.com/.../ADSP-BF542_BF544_BF547_BF548_BF549.pdfRegards,Anand Selvaraj.