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BF706 SPI slave boot questions

Hello,

I'm having great difficulty getting a slave BF706 (call it DSP1) to boot via its SPI2. It's receiving its boot data from a master BF706 (call it DSP0) which is transmitting via its SPI0. DSP0 boots perfectly fine, and appears to conduct the DSP1 boot process through to completion, but DSP1 remains non-functional afterwards. I'll give a detailed overview of my setup/configuration, then ask my questions at the bottom. The boot code for DSP1 has been generated by the elfloader utility with the following command arguments/flags:

  • -width 8
  • -proc ADSP-BF706
  • -b SPISLAVE
  • -bcode 3

Likewise, the following command arguments/flags have been used for the boot code for DSP0, which is booting via serial memory:

  • -width 8
  • -proc ADSP-BF706 
  • -b SPI
  • -bcode 2

DSP0 boots perfectly fine, then handles the DSP1 boot sequence. Here is that sequence of events:

- Firstly, the SPI0 of DSP0 is configured as follows:

  • CLK=99; setting baud rate = 1MHz (my SCLK0=100Mhz)
  • RXCTL=0x1; enabling receive channel (the two DSPs will be communicating after both successfully boot)
  • TXCTL=0x5; transmit enable, transfers are initiated by writing the TFIFO
  • CTL=0x3; enabled, DSP0 is master, setting word transfer size to 8-bit, MIOM is disabled, software control of slave select pin

- Then, DSP0 unresets the ~SYS_HWRST pin of DSP1

- DSP0 then waits until the SPI_RDY signal from DSP1 is asserted

- After receiving the assertion that DSP1 is ready, DSP0 begins the transmission of boot data for DSP1.

Questions

- Am I missing any key flags in my lists of elfloader arguments/switches? Or is anything incorrect about them?

- Is there anything amiss about DSP0's setup of SPI0?

- Does my sequence of events before the boot data transmission occurs look ok?

If all that seems ok, then I'll follow up with my actual transmission routine and more questions.

Any help is appreciated, thank you so much.

Regards,

Jonathan



Added a clarifying note to my baud rate bullet point
[edited by: jmichel3 at 8:57 PM (GMT 0) on 21 Jan 2019]
  • Hi Jonathan,

    Apologies for the delay. While looking into your mail, I understood that you are trying to boot the ADSP-BF706 processor via SPI slave mode. In your setup, the DSP0 is the master device which is going to send the .ldr stream to slave DSP. Please confirm that Is my understanding correct?

    You mentioned that "DSP0 boots perfectly fine, then handles the DSP1 boot sequence". Please let me know that are you flashing the Host code in the DSP0 using SPI master mode? Please elaborate more on this.

    Can you please confirm that what is the boot format you are using? Please note that for SPI slave booting, the "Boot format can be selected as 'Include' format, so that the loader stream can be stored to a buffer array easily at the Host side."

    I suggest you to check the attached SPI Slave Boot example code which works as expected on ADSP-BF707 EZ-Kit for the single mode. In the setup, the ADSP-BF609 processor is used as the Host sending the .ldr stream to ADSP-BF707 processor. Please use this as a reference and modify as per your requirement. Hope this helps.

    Regards,
    Lalitha.S

    SPI_Slave_Booting.zip

  • Hi Lalitha,

    I recently got it working. I'll still answer your questions below in case it helps anyone else. My difficulties arose from my implementation of the transmission routine -- I hadn't correctly configured hardware control of the slave select line. 

    While looking into your mail, I understood that you are trying to boot the ADSP-BF706 processor via SPI slave mode. In your setup, the DSP0 is the master device which is going to send the .ldr stream to slave DSP. Please confirm that Is my understanding correct?

    Yes, that's correct.

    You mentioned that "DSP0 boots perfectly fine, then handles the DSP1 boot sequence". Please let me know that are you flashing the Host code in the DSP0 using SPI master mode? Please elaborate more on this.

    Yes, I'm booting DSP0 in SPI master mode. I write the boot data for DSP0 to external flash, then, upon reset, DSP0 boots via SPI from the location of the boot data.

    Can you please confirm that what is the boot format you are using? Please note that for SPI slave booting, the "Boot format can be selected as 'Include' format, so that the loader stream can be stored to a buffer array easily at the Host side."

    For DSP0, I'm using SPI Master boot. For DSP1, I'm using SPI Slave boot.

    Thank you,

    Jonathan

  • Hi Jonathan,

    Glad to know you resolved this issue and thanks for the update.

    Regards,
    Lalitha

  • Hi, i am ressurecting this question since I am failing to understand the undelying procedure for booting DSP1 from SPI (as slave)... I have to BF707 devices (one is suuposed to be the master-DSP0 that will send the ldr file to the second, slave device-DSP1 through SPI so as to boot from it). I also have configured DSP0 as master and it is working greate and it is starting the sent of data (.lfr file actually) to the slave device-DSP1. HOWEVER, i want to ask

    1) Is it needed for the slave-DSP1 to already "be running" some code before i DSP0 starts sending the ldr (so as to understand and receive through SPI the ldr file or to assert/deassert the RDY signal), or it is configured automatically upon reset to boot from the ldr file already sent ? (and in this case there is no need for DSP1 to be running some preliminary code)?

    2) the procedure I follow  is descibed below :

    (a) I have compiled from within CCES the end application and generated the respective ldr file that i want to sent over SPI for the DSP1 to boot from. (using the configuration settings as the initial post

    • -width 8
    • -proc ADSP-BF706
    • -b SPISLAVE
    • -bcode 3)

    (b) I have compiled from within CCES the application for the master-DSP0 and programmed DSP0 so as to start sending the ldr file generated in (a) through SPI to the slave-DSP1 (and it is working fine). 

    c) WHAT happens to slave-DSP1 now when DSP0 starts sending the ldr??So, I come back to my initial question. How DSP1 accepts the data and "understands" that this is the boot ldr ?  How it asserts/deaaserts the RDY signal ? The "SPI_Slave_Booting.zip" code contains the project form the master-DSP0 part... So as far i understand  there is no need for the slave-DSP1 device to run any preliminary code, right? In this case how i setup/configure slave-DSP1 to accept the data? Is this happening automatically by sending the ldr file generated with the specific configuration mentioned above, or not?

     What am i missing? 

  • Hi Luis, 

    It's good to see someone else referencing my question when trying to do this themself.

    1) If I recall correctly, no. All you should have to do set the SYS_BMODE[1:0] pins of the slave-DSP1 to be 0b10 for "SPI Slave Boot". Then when the slave-DSP1 is brought out of reset, I think its boot kernel contains an SPI driver to accept boot data that way. See the "Boot Modes" section of the ADSPP-BF70x Hardware Reference.

    2) Another important step I remember is that DSP0 needs to wait until DSP1 signals that it's SPI_RDY pin is ready before sending data. So the order of events might look like:

    - DSP1 is wired such that its SYS_BMODE[] pins are in slave SPI boot mode.

    - DSP0 boots

    - DSP0 brings DSP1 out of reset

    - DSP0 monitors SPI_RDY pin until it's asserted (or de-asserted if it's active low)

    - DSP0 starts transmitting boot code to DSP1 via SPI.

    DSP0 may also need to monitor the SPI_RDY pin during the transmission, and pause/spin until it's ready again. I'm unclear about that though.

    Hopefully that helps and an ADI engineer can confirm/correct anything I said.

    Best of luck,

    Jonathan

  • Hi Luis,

    Don't need to run any code in Slave DSP.

    Normally, all the slave booting process is done as, the Host Application would send the Boot Application file to the slave via supported protocols(such as SPI, UART) where the Slave will receive the .ldr and execute in it's own when it's configured to a boot slave mode by Boot Switch/SYS_BMODE pin. The Host DSP will be connected to emulator and slave DSP will not have access to JTAG.

    For SPI slave boot,  The SPIx_RDY output is requires a pulling resistor. The boot code requires the SPIx_RDY signal function as active-low. The host is only permitted to transfer data when SPIx_RDY is in the active state. This functionality allows the processor to hold off the host while the processor is in reset or executing the pre-boot and processor initialization sequences.

    Below is the procedure to do a SPI Slave Booting with two Ezkits.

    1) Connect the two Ezkits via SPI as given in the HRM.
    2) Set the SPI SLAVE boot mode in Slave BOARD.(Boot Switch to "2")
    3) Reset the Slave board and send the loader from Host board.

    We would suggest you to refer the SPI Slave boot mode(Page No:1895/2223) . The link for the ADSP-BF70x Hardware Reference Manual is given below.
    www.analog.com/.../BF70x_BlackfinProcessorHardwareReference.pdf

    Hope this helps. Please let us know if you need any further information on this.


    Regards,
    Divya P