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Sampling frequency for amplitudes of each frequency of 150Hz to 3kHz

thank you very much for your reply.

I try to  generate the fft of any signal in the range of and

calculate the magnitude of each frequency

I use the SPI link between ADC and DSP Blackfin 533.

I want to know what value of sampling frequency should I use? (knowing that I

want to measure the amplitudes of each frequency of 150Hz to 3kHz)

Which registers do I put this value?

What is the values of registers SPI_BAUD, PLL_DIV?

how to calculate?

here the code for the initialization of the register SPI I use:

void Setup_SPI(void)

{

*pSPI_BAUD=0x0004;  // !!!

*pSPI_CTL=0x110a;  }

/ / in the main:

  • pPLL_DIV = 6;

PS: Blackfin DSP 533, ADC = AD7982.

I have read the datasheet, but I can not find the solution.

Please help me

2011/8/17 AndreasL <analog@sgaur.hosted.jivesoftware.com>

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  • Hi,

    as this is no longer related to the original VisualDSP++ Library question, and is about your application configuration, I have branched it to a new discussion and moved to the Blackfin category. Please continue the discussion here.

    Regards,
    Craig.

  • Hi,

    I try to  generate the fft of any signal in the range of 150Hz to 3KHz and calculate the magnitude of each frequency

    I use the SPI link between ADC and DSP Blackfin 533.

    I want to know what value of sampling frequency should I use? (knowing that I want to measure the amplitudes of each frequency of 150Hz to 3kHz)

    Which registers do I put this value?

    What is the values of registers SPI_BAUD, PLL_DIV?

    how to calculate it ?

    here the code for the initialization of the register SPI I use:

    void Setup_SPI(void)

    {

    *pSPI_BAUD=0x0004;  // !!!

    *pSPI_CTL=0x110a;

    *pSPI_FLG=4;

    }

    / / in the main:

    *pPLL_DIV = 6;

    PS: Blackfin DSP 533, ADC = AD7982.

    regards,

    Mathieu

  • Hi Mathieu,

    The SPI Baud Rate register (SPI_BAUD) is used to set the bit transfer rate for a master device. When configured as a slave, the value written to this
    register is ignored. The serial clock frequency is determined by this formula:
    SCK Frequency = (Peripheral clock frequency SCLK)/(2 x SPI_BAUD)

    The SCLK frequency is programmed in the PLL_CTL and PLL_DIV registers.

    The relation between the CLKIN and VCO signal is determined by the values of DF bit and MSEL[5:0] in the PLL_CTL register(VCO=CLKIN*MSEL).Once the VCO is fixed using these two fields in PLL_CTL then the CCLK and SCLK can be obtained by programming values in CSEL and SSEL fields respectively in PLL_DIV register. By programming these registers suitably, you can get the desired SCLK frequency.Also note that the PLL programming sequence must be executed for these changes to take effect. "Dynamic Power Management Controller" chapter in the BF533 HRM would help you in understanding more on this.

    Thanks,

    Vinod

  • Thank you very much Vinod for your help, can you give me a code example for programming this please.

    Mathieu

  • What's is : SCK  and Peripheral clock frequency SCLK  ??

    how can i change the sampling frequency of ADC ??

  • Hi,

    SCLK is the system peripheral clock derived from the input clock signal. All on-chip peripherals of the processor are clocked by the system clock (SCLK).The desired value of SCLK is programmed using the PLL registers as explained in my earlier reply where as, The SCK signal is the SPI clock signal. This control signal is driven by the SPI master and controls the rate at which data is transferred. The master may transmit data at a variety of baud rates which is configurable and the SCK signal cycles once for each bit transmitted. I have attached a sample code where in SPI peripheral is used to interface with an ADC. You can use it for your reference to configure the PLL and SPI registers.

    Thanks,

    Vinod

    SPI_ADC.zip
  • Hi,

    According to the AD7982 datasheet, it capable of converting 1,000,000 samples per second (1 MSPS) = 1MHz.
    What are the proper registers settings and SCLK frequency for setting the  the ADC?

    I want to apply a sampling frequency of 16kHz, how to do this please?

    Thanks,

    mathieu

  • Hi Mathieu,

    If you need to sample the ADC at 16kHz, SPI clock(SCK) should be configured for 16kHz. One of the many possible ways to do it can be as below:

    PLL_CTL=0x0800; // VCO=27MHz*4=108MHz, BF533 has CLKIN=27MHz

    PLL programming sequence

    PLL_DIV=1;         //SSEL=1, SCLK=VCO/1=108MHz

    For SPI clock of 16KHz

    SPI_BAUD=3375;   // SCK=SCLK/(2*3375)=16KHz

    You can use these register configurations in the code to sample the ADC at 16KHz.

    Thanks,

    Vinod

  • Hi Mathieu,

    To achieve a sample frequency of 16kHz, you will need to arrange the interface from your Blackin to provide a Tcyc of 62.5us (CNV signal). So you can either use a slower SCK or you could still read the data with the fastest SCK per the datasheet, but still ensure that the cycle time matches your sample frequency requirement.

    There aren't any register setting configurations required for the AD7982, the SDI input is used for configuration of chain mode/interface modes.

    Which interface mode of the AD7982 are you using?

    best regards,

    Catherine.

  • Hi Catherine,

    i use SPI mode.

    thanks,

    Mathieu