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SDRAM interconnections on Blackfin


I am using a 512Mb SDRAM ( MT48LC32M16A2TG-75 IT-C ) with 16bit data & 13 bit address lines. Following table shows the interconnection,

DSP( EBIU - sdram )

A0 - A9
A11 - A12
ADDR13 - 14
ADDR18 - 19
D0 - D15

I am not confident with the connection of address lines, Do I have to connect A0 of SDRAM to /ABE3 of BF5561 ?


I am using BlackFin ADSP-BF561SBBCZ .

Best Regards,

  • Hi Sunil,

    I have branched your latest question into a new thread and moved it from the Software Modules and SDKs comunnity to the Blackfin Processors community.

    Please continue this discussion here.


  • Hi Sunil.

    Your connections appear correct as is and do not require the proposed connection between A0 and /ABE3.  If you consult the BF561 EZ-KIT schematic, you can compare the devices we use there with the one you've selected:

    Note on page 75 the EBIU connections for this pair of MT48LC16M memories, which are 1/2 the density of yours at 4MB x 16 x 4 banks.  If you compare the datasheet for this memory device with the one you've selected (MT48LC32M16), you will note that the only place they differ in terms of the addressing scheme is that this device requires A9 for the extra column address, whereas the LC16 only needs up to A8.


  • Hi Joe,

    Thank you for the info. I still have a doubt,

    In ADSP561 Hardware reference guide, they have provided a table shows address line connection between SDRAM & BF561.
    It is matching with the BF561 EZ-KIT where they have used two 16 bit SDRAM chips in 32 bit mode( 2 chips each 256Mb - 64MB).

    We are using one SDRAM of 64MB with 16 data bit bank, In the table they have told to connect A0 to SDQM3 or /ABE3.

    The table is given in Page No. 16-60, table 16-12, of the ADSP561 Hardware reference, revision 1.4, February 2013.

    As you said current connections are fine, but in the table they have showed to connect A0 to ABE3.

    Kindly help me with this ASAP.`


  • Apologies, I overlooked the fact that you are talking about a single device and using 16-bit mode.  Since that is the case, I take back my statement that everything looked OK.  I think your address lines should be hooked up like this:

    A0 -> /ABE3

    A1:9 -> ADDR2:10

    A10 -> SA10

    A11:15 -> ADDR12:16

    BA0:1 -> ADDR18:19

    I'll try to get a hardware designer to confirm...


    Message was edited by: Joseph Beauchemin Confirmed with one of the board designers that the most recent guidance is correct.

  • Thank you for the information. Address lines are connected as per the latest guidance.