Analog.com Analog Dialogue Wiki English 简体中文 日本語
EngineerZone
EngineerZone
  • Log In
  • Site
  • Search
  • User
  • Forums

    Popular Forums

    • RF and Microwave
    • Power Management
    • Video
    • FPGA Reference Designs
    • Precision ADCs
    • Linux Software Drivers
    • SigmaDSP Processors & SigmaStudio Dev. Tool

    Product Forums

    • A2B
    • Amplifiers
    • Analog Microcontrollers
    • Clock and Timing
    • Data Converters
    • Direct Digital Synthesis (DDS)
    • Energy Monitoring and Metering
    • Interface and Isolation
    • MEMS Inertial Sensors
    • Processors and DSP
    • Switches/Multiplexers
    • Temperature Sensors
    • Voltage References
    View All

    Application Forums

    • Audio
    • Automated Test Equipment (ATE)
    • Condition-Based Monitoring
    • Depth, Perception & Ranging Technologies
    • Embedded Vision Sensing Library
    • Motor Control Hardware Platforms
    • Optical Sensing
    • Precision Technology Signal Chains Library
    • Video
    • Wireless Sensor Networks Reference Library

    Design Center Forums

    • ACE Evaluation Software
    • ADEF System Platforms
    • Design Tools and Calculators
    • FPGA Reference Designs
    • Linux Software Drivers
    • Microcontroller no-OS Drivers
    • Reference Designs
    • Signal Chain Power (SCP)
    • Software Interface Tools
    • System Demonstration Platform (SDP) Support
  • Learn

    Highlighted Webinar

    Maximize the Benefits of High Bandwidth Current Sense Amplifiers for Space Constrained Applications

    Recent Discussions

    • Pluto is not receiving data
    • ADALM-pluto sampling frequency
    • ADALM PLUTO SDR
    • Bad FIT image format and MSD mounting errors in firmware built for Sidekiq Z2
    • set the sample rate to 30MHz or the maximum that usb2.0 allows

    Places

    • ADI Education Home
    • ADI Webinars
    • StudentZone (Analog Dialogue)
    • Video Annex
    • Virtual Classroom

    Latest Webinars

    • Maximize the Benefits of High Bandwidth Current Sense Amplifiers for Space Constrained Applications
    • Design Efficient Power Solutions for Battery-powered Applications
    • Shunt-based Energy Metering in High-Power Applications
    • Isolating GigaSpeed: Unlocking Data Integrity for USB and HDMI Communication
    • Extend Battery Life and Maximize Performance - Let Supervisors Do The Work
    View All Webinars
  • Community Hub

    Challenge Yourself!

      KCC's Quizzes AQQ244 about Wafer Processing Yield puzzle
    View All

    Places

    • Community Help
    • Logic Lounge
    • The Weekly Brew

    Resources

    • EZ Code of Conduct
    • Getting Started Guide
    • ADI: Words Matter
    • Community Help Videos
    View All
  • Blogs

    Highlighted Blogs

    The Changing Nature of Logistics and Retail Automation

     

    Variable Speed Drive 101

    Latest Blogs

    • How to Optimize Voltage Regulators for Powering an Audio Amplifier
    • EMC Standards: What Are They, and Why Do They Matter?
    • Understanding Grating Lobes with the Phaser (CN0566) Exploration Kit
    • Digitizing, Connecting, and Delivering Energy Efficiency – the Future of Intelligent Buildings
    • Pain or Injury
    Read All Blogs

    ADI Blogs

    • EZ Spotlight
    • The Engineering Mind
  • Partners

    Electronic Design Services - PartnerZone

    • Boston Engineering
    • Calian, Advanced Technologies
    • Colorado Engineering Inc. (DBA CAES AT&E)
    • Clockworks Signal Processing
    • Epiq Solutions
    • Fidus
    • PalmSens
    • Richardson RFPD
    • Tri-Star Design, Inc.
    • VadaTech
    • Vanteon
    • X-Microwave
    View All
ADSP-BF70x
  • Processors and DSP
  • Blackfin Processors
  • ADSP-BF70x
  • Cancel
ADSP-BF70x
Documents FAQ: How to take the core out of reset on BF70x
  • Q&A
  • FAQs/Docs
  • Members
  • Tags
  • More
  • Cancel
  • +Documents
  • ADSP BF706 Ezkit Mini SPI1 cannot be done in master mode.
  • +ADSP-BF707: FAQ
  • -ADSP-BF70X: FAQ
    • Different Wake-up Sources on BF70x
    • FAQ: ADSP-BF70x application cannot boot using Secure Boot
    • FAQ: CPLB enhancements in Blackfin+ Core
    • FAQ: Different Wake-up Sources on BF70x
    • FAQ: Digital watch code for RTC
    • FAQ: Enhancements in Hardware Loop in Blackfin+ core
    • FAQ: Enhancements in Supervisor Mode in Blackfin+ core
    • FAQ: HADC maximum bandwidth
    • FAQ: Highlights of MSI on BF70x
    • FAQ: How can I initialize DDR memory device connected to BF70x processor ?
    • FAQ: How do I access the full memory space of the SPI slave?
    • FAQ: How L2CTL in BF70x is different than BF60x ?
    • FAQ: How the System Cross Bar (SCB) in BF70x different than in BF60x ?
    • FAQ: How to configure MSI IDMAC for Dual Buffer Descriptor Ring mode operation
    • FAQ: How to re-enable the Core clock on BF70x after gating it
    • FAQ: How to send data using SPI READY signal
    • FAQ: How to take the core out of reset on BF70x
    • FAQ: How to use the Signtool Utility to encrypt and sign the unsigned bootstream (loader file generated for an application, example:bootstream.ldr)
    • FAQ: Is INIT Code supported in Secure Boot in ADSP-BF707
    • FAQ: Monitoring Cache Performance on the ADSP-BF70x
    • FAQ: Performance Enhancements in Blackfin+ core
    • FAQ: UART slave boot BF70x with Higher BAUD rate
    • FAQ: Sample code for HADC on BF70x?
    • FAQ: What are the salient features of SPI Host Port on BF70x?
    • FAQ: What is the effect of bus disabling (RDEN bit) on RTC functionality?
    • FAQ: What is the Encrypt-Hash and Hash-Decrypt mode in PKTE module
    • FAQ: What is the purpose of the ownership bit when programming the PKTE module for encryption/hashing?
    • FAQ: What modes of Encryption and Hashing are supported and how do they make an application secure
    • Getting Started with ADSP-BF70x Processors
    • How to re-enable the Core clock on BF70x after gating it
    • Known Errata Against ADSP-BF70x Blackfin+ Datasheet
    • the secret BF70x documentation
    • Where can I find power consumption data for BF70x processors?
    • FAQ: What are the major differences between DMC module of BF60x and BF70x ?
    • FAQ: Cache Enhancements in Blackfin+ core
    • FAQ: Can I pass the output generated from PKA directly to the PKTE module for encryption/decryption
    • FAQ: Configuring Timer in continuous/single pulse mode
  • Example for UART transmit and receive operation using Core Mode for BF707
  • FAQ: BF707 SPI Slave to Master loopback communication

FAQ: How to take the core out of reset on BF70x

Q:

How do you take the core out of reset on the ADSP-BF70x?

--------------

A:

Since BF70x is a single core processor, the core resetting itself is not recommended because once the core puts itself in reset there is no way the core can take itself out of reset. However with the use of DMA and TRU core can be taken out of reset state by programming the TRU in such a way that on user request MDMA is triggered and writes to the Core reset register to take the core out of reset.

The code attached here demonstrates this. The code does following:

  • Core programs TRU such that the Core 0 System Interface Disable Acknowledge (C0_SI_DIS_ACK) is assigned to Core-Reset (RCU0_C0RST) slave trigger.
  • PINT0 trigger(for PA_02, push-button on EZKIT) is assigned to master trigger for MDMA0
  • MDMA descriptors are set up to de-assert the RCU’s reset request.
  • Core programs disable request in RCU (RCU0_SIDIS.SI0) and then goes to IDLE.
  • SVECT0 is loaded with the address of LED blink code in L2 memory
  • As a result of this disable request, the Core completes any outstanding transactions on its interfaces and asserts the Core disable acknowledge. This is connected to the C0_SI_DIS_ACK master trigger of the TRU, and results in Core-Reset Slave trigger to be asserted. This results in the Core getting reset via the RCU. Core is in REST now.
  • When user proesses the Push button 2, MDMA0 is triggered and core is taken out of reset.
  • Having been reset, the Core begins executing from the address in SVECT0.
Attachments:
1565.RCU_HardCoreReset.zip
  • reset
  • bf70x
  • Share
  • History
  • More
  • Cancel
Related
Recommended
Social
Quick Links
  • About ADI
  • ADI Signals+
  • Analog Dialogue
  • Careers
  • Contact us
  • Investor Relations
  • News Room
  • Quality & Reliability
  • Sales & Distribution
  • Incubators
Languages
  • English
  • 简体中文
  • 日本語
myAnalog

Interested in the latest news and articles about ADI products, design tools, training and events?

Go to myAnalog
Analog Logo
©1995 - 2023 Analog Devices, Inc. All Rights Reserved
沪ICP备09046653号-1
  • Sitemap
  • Legal
  • Privacy & Security
  • Privacy Settings
  • Cookie Settings