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Documents How to verify that the boot bytes are accurate in all boot modes for the ADSP-BF60x and ADSP-BF70x?
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  • +ADSP BF706 FAQ:
  • +ADSP-BF707: FAQ
  • -ADSP-BF70X: FAQ
    • Different Wake-up Sources on BF70x
    • ADSP-BF70x application cannot boot using Secure Boot
    • CPLB enhancements in Blackfin+ Core
    • FAQ: Different Wake-up Sources on BF70x
    • Digital watch code for RTC
    • Enhancements in Hardware Loop in Blackfin+ core
    • Enhancements in Supervisor Mode in Blackfin+ core
    • HADC maximum bandwidth
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    • How can I initialize DDR memory device connected to BF70x processor ?
    • How do I access the full memory space of the SPI slave?
    • How L2CTL in BF70x is different than BF60x ?
    • How the System Cross Bar (SCB) in BF70x different than in BF60x ?
    • How to configure MSI IDMAC for Dual Buffer Descriptor Ring mode operation
    • FAQ: How to re-enable the Core clock on BF70x after gating it
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    • What is the Encrypt-Hash and Hash-Decrypt mode in PKTE module
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    • Configuring Timer in continuous/single pulse mode
    • ADSP-BF70X BLACKFIN PROCESSOR SUPPORT COMMUNITY
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    • How to verify that the boot bytes are accurate in all boot modes for the ADSP-BF60x and ADSP-BF70x?

How to verify that the boot bytes are accurate in all boot modes for the ADSP-BF60x and ADSP-BF70x?

ADSP-BF60x/BF70x features CRC32 protection is implemented in hardware. The boot kernel provides mechanisms to allow each block to be verified using a 32-bit CRC.

When building a LDR file for CRC32 protection, use the -CRC32 <PolynomialCoefficient> switch.
-CRC32 (PolynomialCoefficient)

The -CRC32 switch directs the loader to generate CRC32 checksums. It uses the polynomial coefficient if specified, otherwise uses the default coefficient (0xD8018001).

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