Locale Icon
English
  • Forums

    Popular Forums

    • LTspice
    • Video
    • Power Management
    • RF & Microwave
    • Precision ADCs
    • FPGA Reference Designs

    Product Forums

    • Amplifiers
    • Clocks & Timers
    • Data Converters
    • Direct Digital Synthesis (DDS)
    • Energy
    • Interface and Isolation
    • MEMS Inertial Sensors
    • Power Management
    • Processors & DSP
    • Processors & Microcontrollers
    • Switches & Multiplexers
    • Sensors
    • Voltage References
    View All

    Application Forums

    • A2B Audio Bus
    • Audio
    • Automated Test Equipment (ATE)
    • Condition-Based Monitoring
    • Depth, Perception & Ranging Technologies
    • LiDAR Solutions
    • Motor Control Hardware Platforms
    • Speech Processing Solutions
    • Video

    Design Center Forums

    • ACE Evaluation Software
    • ADEF System Platforms
    • Design Tools & Calculators
    • FPGA Reference Designs
    • Linux Software Drivers
    • Microcontroller no-OS Drivers
    • Precision Studio
    • Power Studio Designer
    • Power Studio Planner
    • Reference Designs
    • Robot Operating System (ROS) SDK
    • Signal Chain Designer
    • Software Interface Tools
  • Learn

    Highlighted Webinar

    Power Integrity for High Performance Measurement Systems

    Increasing data rates driven by AI workloads and the evolution from 5G to emerging 6G standards are placing new demands on electronic test and measurement...

    Places

    • ADI Academy
    • ADI Webinars
    • EZ Blogs
    • Video Annex
    • Virtual Classroom

    Libraries

    • 3D ToF Depth Sensing Library
    • Continuous-Wave CMOS Time of Flight (TOF) Library
    • Embedded Vision Sensing Library
    • Gigabit Multimedia Serial Link (GMSL) Library
    • Optical Sensing Library
    • Other Products Library
    • Precision Technology Signal Chains Library
    • Software Modules and SDKs Library
    • Supervisory Circuits Library
    • Wireless Sensor Networks Library

    Upcoming Learning & Events

    • Humanoid Robotics: Deterministic Motion Control & Edge AI Systems
    View All Webinars
  • Community Hub

    Challenge Yourself!

      KCC Quizzes AQQ302 about Bang Gap Reference Generation

      1.Quote of the month: "People Who Say They Sleep Like a Baby usually don't have one" - unknown 2. New quiz AQQ302 about Band Gap Reference Voltage...

    View All

    What's Brewing

      Read the Blog:  Simplified I/O: One Chip, Flexible Voltage Output, Take this Quiz for Another Chance to Win a Gift Card!

      Important: Read the blog first . The quiz questions are all based on the content of the blog: Simplified I/O: One Chip, Flexible Voltage Outpu...

    View All

    Places

    • Community Help
    • Analog Dialogue Quiz
    • Logic Lounge
    • Super User Program

    Resources

    • EZ Code of Conduct
    • EZ How To Help Articles
    • Getting Started Guide
    • ADI: Words Matter
    • Community Help Videos
    View All
  • ContentZone

    Visit ContentZone

    Search content by industry or technology.
    • Blogs
    • Technical Articles
    • Tutorials
    • Videos
    • Webinars
    Your ADI content all in one place.
    View ContentZone

    The Latest Read

    JESD204 Bring-Up: From Link-Up to Data Integrity

    This blog presents a structured bring-up methodology for the ZCU102 + ADRV9009 platform, stepping through each initialization phase in sequence and identifying...

    New Release

    Using the Industrial I/O Framework for Easy Prototyping of Software Defined Radio (SDR) Transceivers
    Using the Industrial I/O Framework for Easy Prototyping of Software Defined Radio (SDR) Transceivers

    Introduction to Industrial I/O, libIIO, and Python software tools

    Recent Technical Insights

    Latest Technical Article from Analog.com
    Evaluating Power Supplies with Different Compensation Settings

    Evaluating Power Supplies with Different Compensation Settings

EngineerZone
EngineerZone
ADSP-BF70x
  • Log In
  • User
  • Site
  • Search
OR
Ask a Question
ADSP-BF70x
  • Processors & DSP
  • Blackfin Processors
  • ADSP-BF70x
  • Cancel
ADSP-BF70x
Documents How to re-enable the Core clock on BF70x after gating it
  • Q&A
  • FAQs/Docs
  • Members
  • Tags
  • Cancel
  • Documents
  • +ADSP BF706 FAQ:
  • +ADSP-BF707: FAQ
  • -ADSP-BF70X: FAQ
    • Different Wake-up Sources on BF70x
    • ADSP-BF70x application cannot boot using Secure Boot
    • CPLB enhancements in Blackfin+ Core
    • FAQ: Different Wake-up Sources on BF70x
    • Digital watch code for RTC
    • Enhancements in Hardware Loop in Blackfin+ core
    • Enhancements in Supervisor Mode in Blackfin+ core
    • HADC maximum bandwidth
    • Highlights of MSI on BF70x
    • How can I initialize DDR memory device connected to BF70x processor ?
    • How do I access the full memory space of the SPI slave?
    • How L2CTL in BF70x is different than BF60x ?
    • How the System Cross Bar (SCB) in BF70x different than in BF60x ?
    • How to configure MSI IDMAC for Dual Buffer Descriptor Ring mode operation
    • FAQ: How to re-enable the Core clock on BF70x after gating it
    • How to send data using SPI READY signal
    • How to take the core out of reset on BF70x
    • How to use the Signtool Utility to encrypt and sign the unsigned bootstream (loader file generated for an application, example:bootstream.ldr)
    • Is INIT Code supported in Secure Boot in ADSP-BF707
    • Monitoring Cache Performance on the ADSP-BF70x
    • Performance Enhancements in Blackfin+ core
    • UART slave boot BF70x with Higher BAUD rate
    • Sample code for HADC on BF70x?
    • What are the salient features of SPI Host Port on BF70x?
    • What is the effect of bus disabling (RDEN bit) on RTC functionality?
    • What is the Encrypt-Hash and Hash-Decrypt mode in PKTE module
    • What is the purpose of the ownership bit when programming the PKTE module for encryption/hashing?
    • What modes of Encryption and Hashing are supported and how do they make an application secure
    • Getting Started with ADSP-BF70x Processors
    • How to re-enable the Core clock on BF70x after gating it
    • Known Errata Against ADSP-BF70x Blackfin+ Datasheet
    • the secret BF70x documentation
    • Where can I find power consumption data for BF70x processors?
    • What are the major differences between DMC module of BF60x and BF70x ?
    • Cache Enhancements in Blackfin+ core
    • Can I pass the output generated from PKA directly to the PKTE module for encryption/decryption
    • Configuring Timer in continuous/single pulse mode
    • ADSP-BF70X BLACKFIN PROCESSOR SUPPORT COMMUNITY
    • DMA error interrupt
    • How to verify that the boot bytes are accurate in all boot modes for the ADSP-BF60x and ADSP-BF70x?

How to re-enable the Core clock on BF70x after gating it

Since BF70x is a single core processor, gating the core clock can make the core unrecoverable since the core can not re-enable its own clock once it has disabled it. However using the system infrastructure properly can allow for the Core clock to be restored. The attached code examples demonstrates this by using the TRU along with DMA to re-enable the core clock and enable the core to execute.

Code does following:

  • Map the GPIO (pushbutton on EZKIT) trigger to MDMA
  • Configure the MDMA to write to CGU_CCBF_DIS to enable the clock back
  • Disable the Core clock
  • Put the core in IDLE
  • Wait for Push button press
  • Pushing the push button trigger the DMA to enable the Core clock

4073.CGU_CoreClockGate_TRU.rar.zip
  • Share
  • History
  • More
  • Cancel
analog-devices logo

About Analog Devices

  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue
  • ADI Developer PortalExternalLink

myAnalog

Interested in the latest news and articles about ADI products, design tools, training, and events?

Go to myAnalog
  • Instagram page
  • Twitter page
  • Linkedin page
  • Youtube page
  • Facebook
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings

©2026 Analog Devices, Inc. All Rights Reserved

analog-devices

About Analog Devices

Down Up
  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

Down Up
  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue
  • ADI Developer PortalExternalLink

myAnalog

Interested in the latest news and articles about ADI products, design tools, training, and events?

Go to myAnalog
Instagram page Facebook Twitter page Linkedin page Youtube page
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings

©2026 Analog Devices, Inc. All Rights Reserved