ADSP-BF706 SPI 1 - DMA - does not work

BF706_DMA_Nonblocking_19032021.rar

Good morning,
I am starting the development of an SPI to communicate with AD4111, I am using SPI1, however even configuring the registers I cannot see the signals, 
I would like a help with this. An attached code follows. Thanks,
  • I try:

    boot:
    void Init_SPI1(void)
    {
    /*
    *pREG_SPI1_CLK = ( ( 9 << BITP_SPI_CLK_BAUD) & BITM_SPI_CLK_BAUD);

    *pREG_SPI1_DLY = ( ((1 << BITP_SPI_DLY_STOP) & BITM_SPI_DLY_STOP) |
    ((1 << BITP_SPI_DLY_LEADX)& BITM_SPI_DLY_LEADX) |
    ((1 << BITP_SPI_DLY_LAGX) & BITM_SPI_DLY_LAGX) );

    *pREG_SPI1_CTL = ( ((SPI1_MSTR << BITP_SPI_CTL_MSTR) & BITM_SPI_CTL_MSTR) |
    ((CPHA << BITP_SPI_CTL_CPHA) & BITM_SPI_CTL_CPHA ) |
    ((CPOL << BITP_SPI_CTL_CPOL) & BITM_SPI_CTL_CPOL ) |
    ((SPI_SIZE << BITP_SPI_CTL_SIZE) & BITM_SPI_CTL_SIZE ) |
    ((LSBF << BITP_SPI_CTL_LSBF) & BITM_SPI_CTL_LSBF ) |
    BITM_SPI_CTL_ASSEL | BITM_SPI_CTL_SELST );


    *pREG_SPI1_TXCTL = (ENUM_SPI_TXCTL_TWC_EN | ENUM_SPI_TXCTL_ZERO | ENUM_SPI_TXCTL_TDR_50 );

    *pREG_SPI1_TWC = BUFF_SIZE;

    *pREG_SPI1_TWCR = 0x00;

    *pREG_SPI1_SLVSEL = (ENUM_SPI_SLVSEL_SSEL1_EN);
    */
    *pREG_SPI1_CLK = 24;
    *pREG_SPI1_DLY = 0; //((1 << BITP_SPI_DLY_STOP) & BITM_SPI_DLY_STOP) ;
    *pREG_SPI1_SLVSEL= ENUM_SPI_SLVSEL_SSEL1_HI | ENUM_SPI_SLVSEL_SSEL1_EN;

    *pREG_SPI1_CTL = ENUM_SPI_CTL_MASTER ;
    *pREG_SPI1_TXCTL = ENUM_SPI_TXCTL_TTI_EN | ENUM_SPI_TXCTL_TWC_EN | ENUM_SPI_TXCTL_ZERO ;
    *pREG_SPI1_RXCTL = ENUM_SPI_RXCTL_OVERWRITE ;

    *pREG_SPI1_TXCTL |= ENUM_SPI_TXCTL_TX_EN; // enable Tx SPI
    *pREG_SPI1_RXCTL |= ENUM_SPI_RXCTL_RX_EN; // enable Rx SPI
    *pREG_SPI1_CTL |= ENUM_SPI_CTL_EN;
    }

    Pins Configuration:
    #define UART0_TX_PORTB_MUX ((uint32_t) ((uint32_t) 0<<16))
    #define UART0_RX_PORTB_MUX ((uint32_t) ((uint32_t) 0<<18))

    #define UART0_TX_PORTB_FER ((uint32_t) ((uint32_t) 1<<8))
    #define UART0_RX_PORTB_FER ((uint32_t) ((uint32_t) 1<<9))

    #define SPI1_CLK_PORTA_MUX ((uint32_t) ((uint32_t) 0<<0))
    #define SPI1_MISO_PORTA_MUX ((uint32_t) ((uint32_t) 0<<2))
    #define SPI1_MOSI_PORTA_MUX ((uint32_t) ((uint32_t) 0<<4))
    #define SPI1_SEL1_PORTA_MUX ((uint32_t) ((uint32_t) 0<<8))

    #define SPI1_CLK_PORTA_FER ((uint32_t) ((uint32_t) 1<<0))
    #define SPI1_MISO_PORTA_FER ((uint32_t) ((uint32_t) 1<<1))
    #define SPI1_MOSI_PORTA_FER ((uint32_t) ((uint32_t) 1<<2))
    #define SPI1_SEL1_PORTA_FER ((uint32_t) ((uint32_t) 1<<4))

    #define SPI2_CLK_PORTB_MUX ((uint32_t) ((uint32_t) 0<<20))
    #define SPI2_MISO_PORTB_MUX ((uint32_t) ((uint32_t) 0<<22))
    #define SPI2_MOSI_PORTB_MUX ((uint32_t) ((uint32_t) 0<<24))
    #define SPI2_SEL1_PORTB_MUX ((uint32_t) ((uint32_t) 0<<30))

    #define SPI2_CLK_PORTB_FER ((uint32_t) ((uint32_t) 1<<10))
    #define SPI2_MISO_PORTB_FER ((uint32_t) ((uint32_t) 1<<11))
    #define SPI2_MOSI_PORTB_FER ((uint32_t) ((uint32_t) 1<<12))
    #define SPI2_SEL1_PORTB_FER ((uint32_t) ((uint32_t) 1<<15))

    int32_t adi_initpinmux(void);

    /*
    * Initialize the Port Control MUX and FER Registers
    */
    int32_t adi_initpinmux(void)
    {
    /* PORTx_MUX registers */
    *pREG_PORTB_MUX = UART0_TX_PORTB_MUX | UART0_RX_PORTB_MUX;

    /* PORTx_FER registers */
    *pREG_PORTB_FER = UART0_TX_PORTB_FER | UART0_RX_PORTB_FER;

    /* PORTx_MUX registers */
    *pREG_PORTB_MUX = SPI2_CLK_PORTB_MUX | SPI2_MISO_PORTB_MUX
    | SPI2_MOSI_PORTB_MUX | SPI2_SEL1_PORTB_MUX;

    /* PORTx_FER registers */
    *pREG_PORTB_FER = SPI2_CLK_PORTB_FER | SPI2_MISO_PORTB_FER
    | SPI2_MOSI_PORTB_FER | SPI2_SEL1_PORTB_FER;

    /* PORTx_MUX registers */
    *pREG_PORTA_MUX = SPI1_CLK_PORTA_MUX | SPI1_MISO_PORTA_MUX
    | SPI1_MOSI_PORTA_MUX | SPI1_SEL1_PORTA_MUX;

    /* PORTx_FER registers */
    *pREG_PORTA_FER = SPI1_CLK_PORTA_FER | SPI1_MISO_PORTA_FER
    | SPI1_MOSI_PORTA_FER | SPI1_SEL1_PORTA_FER;

    return 0;
    }

    Transmitter:
    *pREG_SPI1_SLVSEL &= ~ENUM_SPI_SLVSEL_SSEL1_HI ; // select device

    while(!(*pREG_SPI1_STAT & BITM_SPI_STAT_RFE)) *pREG_SPI1_RFIFO;

    *pREG_SPI1_TWC = 1; // single byte instruction, no addr/data
    *pREG_SPI1_TFIFO = 0xAA; // command ID
    while(!(*pREG_SPI1_STAT & BITM_SPI_STAT_TF)); // wait till completion
    *pREG_SPI1_STAT = BITM_SPI_STAT_TF; // clear latch
    while(*pREG_SPI1_STAT & BITM_SPI_STAT_RFE);

    *pREG_SPI1_SLVSEL |= ENUM_SPI_SLVSEL_SSEL1_HI ; // select device

    But SPI1 does not work, can help or
    opinion?

    Thanks!



  • 0
    •  Analog Employees 
    on Mar 25, 2021 4:58 AM in reply to bimbi.jr

    Hi,

    We suggest you to refer the EE-395 application note for Interfacing the ADC to ADSP-BF70x Blackfin Processors pdf and its code zip from below download link.
    www.analog.com/.../EE395v01.pdf
    www.analog.com/.../EE395v01.zip

    Regards,
    Anand Selvaraj.