Hi ADI's
using BF706 and having a strange problem.The BF706 is receiving images through the cmos chip.The size is 640 * 480.When receive the first RAW image, a black line will appear at the bottom. RAW data received from the frame buffer.I wonder why this is happening.Because of this, if you resize an image of 640 * 480, you will see a line next to the image.The attached fp.png file is a 640 * 480 RAW file captured on the monitor screenAttaches RAW image data.
<Process flow>1. Run the imc_configure function at boot time to set the EPPI (run once at boot time) sys-> fplib-> fpimage is a frame buffer. imc-> cb.dwframeWidth = 640 imc-> cb.dwframeHeight = 480 2. Execute imc_open () and execute imc_capture () after capturing Execute sys-> fplib-> fpimage Import frame data from frame buffer to 640 * 480 size. Fpimg1.raw with the data attached and fp.png from the viwer program. Please make sure that there is a problem in the code regarding the problem that black bold line appears at the bottom of the image. I suspect that the frame buffer memory is bad.Frame buffer size is larger than 640 * 480 size
imc_configure
//---------------------------------------------------------------------------- // Blackfin ADSP-BF706 //---------------------------------------------------------------------------- // File Name : _imc.c // Project : FAS06_v2.0 // Generated : by UNION COMMUNITY Co.,Ltd. 2016.05.10 //---------------------------------------------------------------------------- #include "global.h" #define _USE_IMC_CACHE_ATTRIBUTE #define IMC_PRINTF(s) CON_PRINTF(s) static struct imcinfo __imcinfo__; REG_EPPI_DMA* EPPI_DMA = (REG_EPPI_DMA*)DMACH0_REG_BASE; REG_EPPI* EPPI = (REG_EPPI*)EPPI_REG_BASE; static void imc_enable(void) { EPPI_DMA->cfg |= (ENUM_DMA_CFG_SYNC|ENUM_DMA_CFG_EN); EPPI->ctl |= ENUM_EPPI_CTL_EN; } static void imc_disable(void) { EPPI_DMA->cfg &= ~ENUM_EPPI_CTL_EN; EPPI->ctl &= ~ENUM_EPPI_CTL_EN; } struct imcinfo *getimcinfo(void) { return &__imcinfo__; } static void imc_irq (uint32_t iid, void* handlerArg) { struct imcinfo *imc = getimcinfo(); if(EPPI_DMA->stat | BITM_DMA_STAT_IRQDONE) { imc_close(); EPPI_DMA->stat = BITM_DMA_STAT_IRQDONE; imc->cb.eState = IMC_STATE__COMPLATE; } } u32 imc_capture(void) { struct imcinfo *imc = getimcinfo(); imc_enable(); EPPI_DMA->stat = BITM_DMA_STAT_IRQDONE; adi_int_EnableInt(imc->irq, true); watchdog_signal(); imc->cb.eState = IMC_STATE__READY; while(1) { if(imc->cb.eState == IMC_STATE__COMPLATE) { imc->cb.eState = IMC_STATE__NULL; break; } } adi_int_EnableInt(imc->irq, false); return IMC_SUCCESS; } void imc_close(void) { struct imcinfo *imc = getimcinfo(); watchdog_signal(); imc_disable(); } u32 imc_configure(void) { struct imcinfo *imc = getimcinfo(); struct sysinfo *sys = getsysinfo(); if(imc->cb.eState == IMC_STATE__NULL) return IMC_ERR_INVALID_STATE; // EPPI DMA Channel1 Setting EPPI_DMA->addr_start = (u32) sys->fplib->fpimage; EPPI_DMA->cfg = 0x00000000; EPPI_DMA->cfg = ENUM_DMA_CFG_ADDR2D | ENUM_DMA_CFG_YCNT_INT | ENUM_DMA_CFG_STOP | //ENUM_DMA_CFG_AUTO | ENUM_DMA_CFG_STOP | ENUM_DMA_CFG_PSIZE04 | ENUM_DMA_CFG_MSIZE04 | ENUM_DMA_CFG_WRITE | ENUM_DMA_CFG_SYNC | ENUM_DMA_CFG_DIS; EPPI_DMA->xcnt = imc->cb.dwframeWidth/4; EPPI_DMA->xmod = 4; EPPI_DMA->ycnt = imc->cb.dwframeHeight; EPPI_DMA->ymod = 4; // EPPI Setting EPPI->imsk = 0xFF; EPPI->ctl = 0x00000000; EPPI->ctl = ENUM_EPPI_CTL_DMA1CHAN | ENUM_EPPI_CTL_PACK_EN | ENUM_EPPI_CTL_DLEN08 | ENUM_EPPI_CTL_FS1HI_FS2HI | ENUM_EPPI_CTL_POLC00 | ENUM_EPPI_CTL_FLDSEL_HI | ENUM_EPPI_CTL_SYNC2 | ENUM_EPPI_CTL_NON656 | ENUM_EPPI_CTL_RXMODE | ENUM_EPPI_CTL_DIS; EPPI->hcnt = imc->cb.dwframeWidth; EPPI->line = imc->cb.dwframeWidth; EPPI->vcnt = imc->cb.dwframeHeight; EPPI->frame = imc->cb.dwframeHeight; imc->cb.eState = IMC_STATE__READY; return IMC_SUCCESS; } u32 imc_open(void) { u32 ret; struct imcinfo *imc = getimcinfo(); imc->cb.eState = IMC_STATE__INIT; //ret = imc_configure(); return ret; } void imc_init(int mode) { struct imcinfo* imc = getimcinfo(); struct sysinfo* sys = getsysinfo(); // zero-initialize info block kbzero(imc,sizeof(struct imcinfo)); if(sys->config.fpapi.sensor == FS_FCS06) { // FCS06 센서일 경우 imc->config.eSrcImgType = IMC_SRC_IMG__GRAY; // default 640*480 시작 좌표는 (80,8) 이지만 CMOS를 셋팅했으므로 (0,0)이다. imc->config.dwLeftWnd = 0; imc->config.dwTopWnd = 0; imc->config.dwRightWnd = IMC_SRC_WIDTH_SIZE-1; //0+640-1; imc->config.dwBottomWnd = IMC_SRC_HEIGHT_SIZE-1; //0+480-1; imc->cb.dwframeWidth = IMC_MAX_ACTIVE_WIDTH_SIZE; imc->cb.dwframeHeight = IMC_MAX_ACTIVE_HEIGHT_SIZE; imc->cb.dwframeSize = (IMC_MAX_ACTIVE_WIDTH_SIZE * IMC_MAX_ACTIVE_HEIGHT_SIZE); imc->cb.eState = IMC_STATE__INIT; } imc_configure(); imc->irq = INTR_EPPI0_CH0_DMA; adi_int_InstallHandler(imc->irq, imc_irq, NULL, false); }
imc.h
//---------------------------------------------------------------------------- // Pixelplus PM1002K //---------------------------------------------------------------------------- // File Name : imc.h // Project : FAS02NL2 // Generated : by UNION COMMUNITY Co.,Ltd. 2008.10.10 //---------------------------------------------------------------------------- #ifndef __IMC_H__ #define __IMC_H__ /*! Memory required for the ov7692 sensor driver itself excluding the memory required by its dependent drivers */ #define IMC_SELF_MEMORY_SIZE 70 /*! * Memory required for the operation of OV7692 driver in bytes. */ //#define IMC_MEMORY_SIZE (IMC_SELF_MEMORY_SIZE + IMC_EPPI_MEMORY_SIZE + ADI_TWI_MEMORY_SIZE) #define IMC_MAX_ACTIVE_WIDTH_SIZE FULL_WIDTH #define IMC_MAX_ACTIVE_HEIGHT_SIZE FULL_HEIGHT #define IMC_SRC_WIDTH_SIZE FULL_WIDTH #define IMC_SRC_HEIGHT_SIZE FULL_HEIGHT /*! Number of bytes required to store the pixel. */ #define IMC_BYTES_PER_PIXEL 2 #define IMC_Y_BYTES_PER_PIXEL 1 /*! Number of registers needed to configure the size */ #define IMC_IMAGE_CFG_ARRAY_SIZE 14 #define IMC_SUCCESS 0 #define IMC_ERR_INVALID_SIZE 1 #define IMC_ERR_INVALID_STATE 2 #define IMC_ERR_BUS_ERROR 3 #define IMC_ERR_MEM_OVERFLOW 4 #define IMC_ERR_FIFO_FULL 5 #define IMC_FAIL_ERROR 6 /* * DMA Register Set */ #define DMACH0_REG_BASE 0x2008A000 #define DMACH1_REG_BASE 0x2008B000 typedef struct _REG_EPPI_DMA_ { VULONG dscptr_nxt; VULONG addr_start; VULONG cfg; VULONG xcnt; VULONG xmod; VULONG ycnt; VULONG ymod; VULONG Reserved1; VULONG Reserved2; VULONG dscptr_cur; VULONG dscptr_prv; VULONG addr_cur; VULONG stat; VULONG xcnt_cur; VULONG ycnt_cur; }REG_EPPI_DMA; /* * EPPI Register Set */ #define EPPI_REG_BASE 0x20063000 typedef struct _REG_EPPI_ { VULONG stat; VULONG hcnt; VULONG hdly; VULONG vcnt; VULONG vdly; VULONG frame; VULONG line; VULONG clkdiv; VULONG ctl; VULONG fs1_wlhb; VULONG fs1_paspl; VULONG fs2_wlvb; VULONG fs2_paspf; VULONG imsk; VULONG oddclip; VULONG evenclip; VULONG fs1_dly; VULONG fs2_dly; VULONG ctl2; }REG_EPPI; typedef enum { IMC_STATE__NULL = 0, IMC_STATE__INIT, IMC_STATE__READY, IMC_STATE__CAPTURING, IMC_STATE__COMPLATE, IMC_STATE__ERROR } IMC_STATE_TYPE; // Image mode typedef enum { IMC_SRC_IMG__GRAY = 0, IMC_SRC_IMG__BAYER = 1, IMC_SRC_IMG__YCbCr } E_IMC_SRC_IMG_TYPE; // Type of column/row line sub-sample scale from orignal image(window size). typedef enum { IMC_SMP_SCL__DIV_1 = 0, IMC_SMP_SCL__DIV_2 = 1, IMC_SMP_SCL__DIV_4 = 2, IMC_SMP_SCL__DIV_8 = 3, IMC_SMP_SCL__DIV_16 = 4, IMC_SMP_SCL__DIV_32 = 5, IMC_SMP_SCL__DIV_64 = 6, IMC_SMP_SCL__DIV_128 = 7 } E_IMC_SMP_SCL_TYPE; // Source type of input image. typedef enum { IMC_SMP_SRC_EXT = 0, IMC_SMP_SRC_FRMMEM = 2, IMC_SMP_SRC_IPOL = 5 } E_IMC_SMP_SRC_PATH; // Bayer pattern typedef enum { IMC_BAYER_PAT__RGRG = 0, IMC_BAYER_PAT__GBGB = 1, IMC_BAYER_PAT__GRGR = 2, IMC_BAYER_PAT__BGBG = 3, IMC_BAYER_PAT__NONE = 4 } E_IMC_BAYER_PAT_TYPE; // Source of Writing data typedef enum { IMC_WRITE_SRC__EXT = 0, IMC_WRITE_SRC__SUBSAM, IMC_WRITE_SRC__IPOL } E_IMC_WRITE_SRC_PATH; // Source of output data to use HV, BDU... typedef enum { IMC_OUTPUT_SRC__EXT = 0, IMC_OUTPUT_SRC__SUBSAM, IMC_OUTPUT_SRC__FRMMEM, IMC_OUTPUT_SRC__IPOL } E_IMC_OUTPUT_SRC_PATH; // Source of bayer interpolation typedef enum { IMC_IPOL_SRC__EXT = 0, IMC_IPOL_SRC__SUBSAM, IMC_IPOL_SRC__FRMMEM, IMC_IPOL_SRC__NONE } E_IMC_IPOL_SRC_PATH; struct imcinfo { int type; bool open; u32 irq; struct { u32 eSrcImgType; u32 dwLeftWnd; // x-coordinate of the upper-left corner on the rectangle u32 dwTopWnd; // y-coordinate of the upper-left corner on the rectangle u32 dwRightWnd; // x-coordinate of the lower-right corner on the rectangle u32 dwBottomWnd; // y-coordinate of the lower-right corner on the rectangle } config; struct { u32 dwframeWidth; u32 dwframeHeight; u32 dwframeSize; u32 dwWndWidth; u32 dwWndHeight; IMC_STATE_TYPE eState; } cb; }; struct imcinfo *getimcinfo(void); u32 imc_capture(void); void imc_close(void); u32 imc_open(void); void imc_init(int mode); #endif //__IMC_H__
Thank you
HI ,I was doing BF706 image collection, and found that the EPPI controller did not work. l am sure that the image datas 3835.EPPI_Image.rar have come from sensor, but EPPI does not collect data. Could you please help me ? ,tihis my code ,check
Hi,This query has been already answered in the below thread.ez.analog.com/.../342280 Regards,Anand Selvaraj.