ADSP-BF70X: FAQ

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    DMA error interrupt

    Processor: ADSP-BF70x All the DMA error interrupts are combined into a single shared interrupt. Combined error signals require reading the DMA_STAT register of each DMA channel associated with a combined…
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    How to verify that the boot bytes are accurate in all boot modes for the ADSP-BF60x and ADSP-BF70x?

    ADSP-BF60x/BF70x features CRC32 protection is implemented in hardware. The boot kernel provides mechanisms to allow each block to be verified using a 32-bit CRC. When building a LDR file for CRC32 protection…
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    ADSP-BF70x application cannot boot using Secure Boot

    Question: I have a BF70x application which cannot boot in secure mode. The same application boots without issue using non-secure mode ----------------------------- Answer: ADSP-BF70x processors…
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    ADSP-BF70X BLACKFIN PROCESSOR SUPPORT COMMUNITY

    For the discussion of ADSP-BF70x processors, peripherals, programming, applications and hardware design. Please read the Analog Devices EngineerZone Code of Conduct before posting.
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    Cache Enhancements in Blackfin+ core

    1. Instruction Cache Way Locking: The instruction cache way locking feature is no longer supported in new Blackfin+ core. 2. Direct access to cache and Instruction memory space: Blackin+ processor…
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    Can I pass the output generated from PKA directly to the PKTE module for encryption/decryption

    Q: Can I pass the output generated from PKA directly to the PKTE module for encryption/decryption? -------------- A: No, this cannot be done directly as PKTE supports Little Endian format whereas…
  • Article

    Configuring Timer in continuous/single pulse mode

    In single-pulse PWMOUT mode, the timer generates a single pulse on the TIMER_TMR[n] pin. This mode is frequently used to implement a precise delay, often with generating an output trigger. In continuous…
  • Article

    CPLB enhancements in Blackfin+ Core

    1. CPLB default MMRS New MMRs are added to take specific default action when data or instruction CPLBs are missed. A default cache mode, memory properties, access restrictions can be programmed in…
  • Article

    Different Wake-up Sources on BF70x

    Following are the Wake-up sources from Hibernate mode: PB07: Geneal purpose wakeup source PB08: Geneal purpose wakeup source PB12 : Geneal purpose wakeup source PC02: Geneal purpose wakeup source…
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    Digital watch code for RTC

    The attached code implements the digital watch functionality using the RTC. For the ease of use,the code accepts the date and time in Sec:Min:Hr DD/MM/YR format and get the date and time from RTC in same…

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