My question : how to boot dual-core application from different location in Flash memory ?
Enviroment : BF609-EZKIT , CCES 188.8.131.52 , emulator 100B or HPUSB-ICE
1. I wrote simple dual-core application , i.e. LED Blink :
Core0 - LED 1 and LED 2 on the BF609-EZKIT board
Core1 - LED 3 and LED 4 on the BF609-EZKIT board
2. My CCES setup for dual core-application (in Post-build steps field)
elfloader.exe -proc ADSP-BF609 -si-revision 0.1 -b MEMORY -f binary -width 16 -bcode 0x01 C:\CCES\App_Core0\Debug\App_Core0.dxe -NoFinalTag C:\CCES\App_Core1\Debug\App_Core1.dxe -o c:\tftp-root\prog0.ldr
It means that I link 2 *.dxe files into one *.ldr file (prog0.ldr) . In LdrViewer it is visible as multi-dxe structure (2 dxe blocks) without Final Flag after first block. So it looks good.
3. If I run this application via Emulator : it works OK !!! (both cores OK )
4. If I programmed prog0.ldr file into default location in Flash memory ( 0xb0000000) and press RESET : it works OK !!! (both cores OK)
5. If I programmed prog0.ldr file into any different location ( i.e. 0xb0100000 ) and I tried to use rom_Boot () function it DOESN'T WORK !!!
( none core doesn't work !!!!)
Example of use rom_Boot() function below :
#define _BOOTROM_MEMBOOT 0xC800000C
int (*BOOTROM_MEM)(void *, int, int, void *, int , void *) = (void *) _BOOTROM_MEMBOOT; // => 0xC800000C
BOOTROM_MEM(0xb0100000 , 0x00, 0 , NULL, 0x01,NULL); (call rom_BOOT () function !!!)
I checked a lot of argument combinations in the BOOTROM_MEM () function call , but without any success .
6. If I use the same method for booting single-core application it works OK !!!
(but only when the application doesn't include InitCode !!! ) .
The application with InitCode included looks like multi-dxe application ( has got 2 dxe blocks)
May be it is similar problem ?
So I am surprise why the same file ( prog0.ldr ) works properly from default location but doesn't work from any other ?
I'd like to write a Second Stage Loader Application and I very need this possibility .
Where is the problem ? Could anybody help me , please ?
Thank you in advance
Can you verify that when you program the flash at 0xb0100000 that the entire contents of the LDR have been programmed? You can do this by using -cmd compare with CLDP.exe.
I solved this problem. The solution is simple but unfortunately there is no way to find it in any docs !!!
I spent a lot of time to do it.
Here it is: Your calling application MUST be dual-core application too !!!
So (as in my case) , if you use U-boot bootloader as calling application it will not work !!!
By default u-boot is built as a single-core application and you MUST change u-boot to dual-core application !!!
I performed following steps:
1. Rebuilt u-boot code (in Linux enviroment) with defined :
2. Merge obtained u-boot code (u-boot) with any Core 1 application (Uboot_Core1.dxe) as follow:
bfin-elf-ldr -T bf609 -c u-boot2.ldr u-boot Uboot_Core1.dxe --bmode PARA --use-vmas --initcode arch/blackfin/cpu/initcode.o -J --punchit $((0x8000)):$((0x8000)):env-ldr.o
3. In result we obtained dual-core u-boot2.ldr application
4. This application can boot another dual-core application !!!!
May be it will be usefull for somebody
I also have this problem.
1. When the ldr is programmed and booted directly from the SPI flash (at offset 0) it is good - both cores are running as designed. (No SSL being used).
2. When the ldr is programmed at a different offset in the SPI flash (I am using 65536) then it is no good - in fact only core 0 is running. (SSL is programmed at offset 0).
I have tried making my the SSL a dual core application but it doesn't make any difference.
My SSL is using the rom_Boot () function API call.
The question is : why does only one core run if the SSL is used to load the application ?
Can anyone help me please.
So sorry - I have supplied incorrect information. When the SSL is used nothing seems to run unless it's a single core application. When the application is booted directly (without an SSL) both cores run as designed.
This is the call to rom_Boot : rom_Boot(App1, 0, 0, 0, 0x20210002, 0);
The flash is wired to SPI0.
When the application is booted, the core 0 application will make a call to adi_core_enable(ADI_CORE_1) to enable core 1. From the sounds of it, my guess is that this is not being done when you use your second stage loader. Can you verify that rom_Boot is called with the correct parameters? Can you break once your dual core application is loaded by your SSL and then do a comparison or a check to see if everything got booted correctly?