BF 609 Power Up sequence?

Hi Raju,

 
To assist you better, Could you please explain in detail about what you have tried from which chapter of datasheet/HRM.


Regards,
Divya.P

Hi Divya

As per HRM BlackFin Datasheet page no-60,61 I Have ADM708s WDI is there for BlackFin Reset.

But I Ignored WDI ADM708s , now I Connected Hardware Reset to BlackFin directly . after Power On If I Run The Source Code Which I want To Debug. i was getting Message In Console like

Reset:Setting Core 0 PC to reset vector :0xffa00000

Load application :"Source code path"

Load Completed.

Load application :"Source code Path"

Load completed.

After this I click on Full run I was Getting Error like

A non -recoverable Error or Exception has occurred

Description :Attempted Misaligned Instruction Fetch (Exception with EXCAUSE =0X2A)

General Type:Un handled Exception

Specific Type:Instruction Fetch Misaligned

Error Pc:0xffa0fae6

OR

A non -recoverable Error or Exception has occurred

Description : a Data CPLB miss has Occurred without Corresponding CPLB entry.

General Type:RuntimeError

Specific Type:DCPLB miss Without Replacement 

Error Pc:0xffa06c0a

I'm unable to Find out what was my Mistake in BlackFin Power up Sequence

Please Help me with this

Hi Raju,

If you are using CPLBs, it is necessary that you have a valid CPLB entry defined for every memory region that you access (you need not enable cache though). In case you access a memory that does not have a valid CPLB entry, you will get this exception.

The Blackfin Programming Reference Manual has more details on this error. The Table titled "Events That Cause Exceptions" in the chapter "Program Sequencer" gives details on the different exceptions. The type of exception caused, and the reason why it is caused can be identified by viewing the EXCAUSE field in the SEQSTAT register (Register -> Core -> Status -> Sequencer Status).
www.analog.com/.../Blackfin_pgr_rev2.2.pdf

From the table of EXCAUSE values, you can identify if you have got an instruction CPLB miss or a data CPLB miss. If it is an instruction CPLB miss, you can find the instruction that caused it to happen by looking at the RETX register. (Register -> Core -> Sequencer -> RETX). Also, the faulting address can be found from the I/DCPLB_STATUS registers. You can now add a CPLB entry for the region of memory that covers this faulting address.

Also, the exceptions can be caused by many different scenarios like configurations errors and/or emulator settings errors or corruption of the configuration files. We would recommend you to first try to clean your project, restart CCES, then do a Build and Debug.

However, we would recommend that you should also try to create a new Cross-core Project and use the default settings for the BF60x with the ICE-1000 or ICE-2000.

We believe that you are using Custom board. Please confirm?

While executing your application, exactly in which place the exception hits? Could you please step-through the code and let us know the observations.

Do you get Clock and Reset Timing after power On the BF609 as mentioned in the datasheet. Please probe these lines and check.

Regards,
Divya.P

Hi Raju,

If you are using CPLBs, it is necessary that you have a valid CPLB entry defined for every memory region that you access (you need not enable cache though). In case you access a memory that does not have a valid CPLB entry, you will get this exception.

The Blackfin Programming Reference Manual has more details on this error. The Table titled "Events That Cause Exceptions" in the chapter "Program Sequencer" gives details on the different exceptions. The type of exception caused, and the reason why it is caused can be identified by viewing the EXCAUSE field in the SEQSTAT register (Register -> Core -> Status -> Sequencer Status).
www.analog.com/.../Blackfin_pgr_rev2.2.pdf

From the table of EXCAUSE values, you can identify if you have got an instruction CPLB miss or a data CPLB miss. If it is an instruction CPLB miss, you can find the instruction that caused it to happen by looking at the RETX register. (Register -> Core -> Sequencer -> RETX). Also, the faulting address can be found from the I/DCPLB_STATUS registers. You can now add a CPLB entry for the region of memory that covers this faulting address.

Also, the exceptions can be caused by many different scenarios like configurations errors and/or emulator settings errors or corruption of the configuration files. We would recommend you to first try to clean your project, restart CCES, then do a Build and Debug.

However, we would recommend that you should also try to create a new Cross-core Project and use the default settings for the BF60x with the ICE-1000 or ICE-2000.

We believe that you are using Custom board. Please confirm?

While executing your application, exactly in which place the exception hits? Could you please step-through the code and let us know the observations.

Do you get Clock and Reset Timing after power On the BF609 as mentioned in the datasheet. Please probe these lines and check.

Regards,
Divya.P

Hi Divya

We believe that you are using Custom board. Please confirm?

Yes I'm working With Custom Board only.

While executing your application, exactly in which place the exception hits?

 I was getting Error  at First instruction of Main Function Only

 When Program stuck in IDEAl (Core 0 suspended )

I just Checked With Disassembly For Address

It's like IDEAL i don't Know Why It's Entered in IDEAL state.

I just Configured CPLB for SMC Should I Change /Miss Matches Any Configuration for this?

I'm Unable to Find out Why this Message Is presenting When I try to Debug My Code?

Reset:Setting Core 0 PC to reset vector :0xffa00000

Load application :"Source code path"

Load Completed.

Load application :"Source code Path"

Load completed.

Hardware is Like:

-SYS_HWREST is active low pin With Pulldown Resistor.

-BlackFin Lines Getting ADSP_RESET#, Clock

All the Voltages okay.

But I'm Unable to Find out My mistake

Can you Please Help Me With This.

Thanks

Regards,

RAJU

Hi Raju,

Could you please create a new Cross-core Project and Debug. Please share the screenshot when error is occurred.

just Configured CPLB for SMC Should I Change /Miss Matches Any Configuration for this?
>> Let us know what changes you have made.

Are you facing this issue with all application or specific application. If its specific application, please share your simple project to simulate this issue.

Regards,
Divya.P

Hi Divya,

I'm Just Confusing With Output.

I just Configured BlackFin Input Clock as 25MHZ Now it's BlackFin Getting RESET#

Whats is the Deference Between 40MHZ &25MHZ input Clock For BlackFin 609..

- In BlackFin Application GPIO Set & Clear is Working if it's Comming To SMC Configuration, SMC Unable to Overwrite Data into 0xB4000000 particular Memory Location. I just Confirmed With Memory Browser

-Same itaration Is Working With BlackFin Evaluation Board?

Can you Help Me with this?

Regards,

Raju,

Hi Raju,

You can use SYS_CLKIN Frequency (using a crystal) from 20 to 50 MHz. But please make sure that other clocks like core clock, SYSCLK, SCLK0, SCLK1, DDR2, etc.. are in within the specification as mentioned in the datasheet.
Please refer “Table 17. Clock Operating Conditions” for clock timing requirements:
www.analog.com/.../ADSP-BF606_607_608_609.pdf

In BlackFin Application GPIO Set & Clear is Working if it's Comming To SMC Configuration, SMC Unable to Overwrite Data into 0xB4000000 particular Memory Location. I just Confirmed With Memory Browser
-Same itaration Is Working With BlackFin Evaluation Board?
>>In Ezkit AMS0 signal only connected to 32 MB (16M x 16) Numonyx PC28F128P33B parallel flash chip. So, we are unable to test this in Ezkit.
Also, this SMC query have been handled in the below thread. To avoid duplication of effort please continue the discussion there.
ez.analog.com/.../smc0-address-bus-data-bus-in-blackfin-609

Regards,
Divya.P