How to implement BF60x SPI slave boot?

Hi,

I am using BF607, and trying to implement a C/C++ program on an MCU (running Unix) to boot DSP via SPI Slave Boot Mode. I tried the following configuration/program but still not able to start the DSP property. 

I wrote a led test program and converted it into the bootable loader file. I was using the following configuration. 

On the MCU side, I was using the ioctl() command.

During transmission, MCU was following the program flow identified in the datasheet. 

 

My Question:

1. Is there a code example or application note for SPI slave boot? 

2. The prototype I have does not have the SPI_RDY connected to MCU. Instead of checking on the SPI_RDY pin, the MCU program waits for about 5ms before sending the next byte. I am not sure whether this approach would work or do I have to use SPI_RDY? 

3. The SS pin toggles after each transmission, I am wondering whether that is acceptable or do I have to keep SS low during the entire process?  

 

Thanks

Sean

  • 0
    •  Analog Employees 
    on Sep 25, 2020 1:26 PM 1 month ago

    Hi,

    Apologies for the delay.

    Regarding "Is there a code example or application note for SPI slave boot? "
    >> Please find the attached example project for SPI slave boot where ADSP-BF609 acts as master and ADSP-BF707 as slave .A loader file of simple led blink application is created which has to performed at slave side in ADSP-BF707. Now, ADSP-BF609 sends (BF707_LED_Blink_SPI_SLAVE.ldr ) loader file through the host code to the ADSP-BF707. You can use this example code as a reference and modify as per your requirement.

    Regarding "The prototype I have does not have the SPI_RDY connected to MCU. Instead of checking on the SPI_RDY pin, the MCU program waits for about 5ms before sending the next byte. I am not sure whether this approach would work or do I have to use SPI_RDY?"
    >> The SPI_RDY pin is important. The boot code initially samples the state of the BF70x SPIx_RDY pin to determine whether the signal is active high or active low and configures polarity in the SPI peripheral accordingly. The host is only permitted to transfer data when SPIx_RDY is in the active state. This allows the processor to hold off the host while the processor is in reset or executing the pre-boot and processor initialization sequences.

    The SPI_RDY basically does the same functionality as the HWAIT in previous Blackfin processors. The polarity of SPI_RDY can be either active high or low depending on the pull-up/pull-down used on this signal. BTW, the SPI on BF70x is enhanced as compared to previous Blackfin processors. You can find more details about the SPI module in the HRM.

    Regarding "The SS pin toggles after each transmission, I am wondering whether that is acceptable or do I have to keep SS low during the entire process?"
    >> As mentioned in the HRM, The host must provide an active-low chip select signal that connects to the SPI0 SS input of the Blackfin processor. It can toggle with each byte transferred or remain low during the entire procedure.

    SPI_Host.zip
    Regards,
    Anand Selvaraj.