Parity error in L1 data bank A cache

I am developing dual core application on BF609 revision 0.2 under CCES 2.8.3

Core A runs under RTOS, Core B is bare metal H.264 encoder.

After the initialization everything works fine. Both cores work properly.

When I am trying to reset the core B by a core A a parity error occurs:

A non-recoverable error or exception has occurred.
Description: Parity error in L1 data bank A cache
General Type: ParityError
Specific Type: DataBankACache
Error PC: 0xc80bf182

The core B reset code looks as below:

/* Clear CORE B reset status bit */
*pREG_RCU0_CRSTAT = BITM_RCU_CRSTAT_CR1 ;

/* Disable system interfaces for CORE B */
*pREG_RCU0_SIDIS = BITM_RCU_SIDIS_SI1 ;


while ((*pREG_RCU0_SISTAT & BITM_RCU_SISTAT_SI1) == 0) ;

/* Reset CORE B */
adi_core_1_disable() ;


while ((*pREG_RCU0_CRSTAT & BITM_RCU_CRSTAT_CR1) == 0) ;

....

/* Re-enable system interfaces for CORE B */
*pREG_RCU0_SIDIS = 0 ;

/* Take CORE B out of reset */
adi_core_1_enable() ;

Anyone can help me in solving my issue