After bootup application runs from SPI flash instead of DDR.

Thanks for the sample program. But using the program is creating a serious issue on our eval kit ADSP-BF609 EZKIT

The program works fine when not flash and directly used with JTAG

We after checking its working of LED blinking we flashed  on SPI Flash memory using following command

"cldp -proc ADSP-BF609 -emu 2000 -driver "C:\Analog Devices\ADSP-BF609_Evaluation_Board-Rel1.1.0\BF609_EZ-Board\Blackfin\Examples\Device_Programmer\serial\bf609_w25q32bv_dpia.dxe" -cmd prog -erase all -format hex -file "C:\Users\xxxxx\Documents\LED (1)\LED\Debug\LED_Blink.ldr""

After flashing we saw that LED were not blinking (SW2 is on 3) and we tried flashing the program again. But now we were not even able to flash the program to memory and the cldp window as below

We would like to have this issue of both booting(flash) and the execution from SDRAM and flashing to flash memory to be working again since we are working with only 1 eval kit

In addition to above major issue We also have another query

1. After  booting from flash, does the application executes from SDRAM or SRAM ?
2. If from SRAM we would like to have the settings to be such that our final application after booting from SSPI Flash to execute in SRAM for much faster execution 

Hello,

An SR has been logged through private support for this issue, and will continue to be dealt with through that channel. We will post the final result here, if appropriate.

Regards,
Lalitha

Hi,

I also have other queries:

1) Booting is slower as compared to L1 memory it's fine but time duration of two LED's toggling is also very slow as compared to LED's toggling on emulator.

2) How can I run my application from flash but LED's toggling time should be same on both using emulator as well as running application from flash.

Any help would be greatly appreciated.

Hello,

As we already mentioned that, this is known behavior. upon  the  deassertion of  /RESET,  the  processor  starts  the  boot  process  by  executing  the  on-chip  boot  ROM,  which  determines  the  boot  mode, sets up the proper DMA channels (read from externa  memory to L1 memory), and  then  puts  the  processor  in  an  idle state awaiting for the completion of a DMA read transaction. After parsing the block of bytes read by the DMA, the boot ROM initiates another DMA transaction to load more bytes until all the bytes have been read. Note  that  the  booting routine is executed from the boot ROM, which is slower than L1 memory.

Regards,
Lalitha.S