Image Block Shift on BF609 : due to conflict from Core0 and PVP 3 streams' DMA trying to visit a same bank of DDR2 ??


The platform is BF609.

The scenario is PPI0--> PVP--> Core0.

We use 3 PVP streams:  Threshold, Sobel X, Sobel Y. 

The bank configuration as bellow:

//================================================================================code begine=======================================
#pragma section ("sdram_bank7") 
static int16_t GxOutBuf[PEC_OUT_BUF_SIZE];
#pragma section ("sdram_bank7") 
static int16_t GxOutBuf1[PEC_OUT_BUF_SIZE];
#pragma section ("sdram_bank7")
static int16_t GxOutBuf2[PEC_OUT_BUF_SIZE];

#pragma section ("sdram_bank6")
static int16_t GyOutBuf[PEC_OUT_BUF_SIZE];
#pragma section ("sdram_bank6")
static int16_t GyOutBuf1[PEC_OUT_BUF_SIZE];
#pragma section ("sdram_bank6")
static int16_t GyOutBuf2[PEC_OUT_BUF_SIZE];

#pragma section ("sdram_bank4") 
static uint8_t THCOutBuf[PEC_OUT_BUF_SIZE];
#pragma section ("sdram_bank4")
static uint8_t THCOutBuf1[PEC_OUT_BUF_SIZE];
#pragma section ("sdram_bank4") 
static uint8_t THCOutBuf2[PEC_OUT_BUF_SIZE];

//======================================================================code ends================================================================

In this allocation, we avoid the conflict from Different PVP streams trying to write to a same bank.

But we cannot guarantee conflict between Core0 and PVP.


When we check the output three img, which are Bina IMG,  Sobel X IMG,  Sobel Y IMG,   for nearly every 30 frames, we observe a strange shift in either one img. 

I notice in other forum and here that some guy met the same problem.  In his words, this bad thing happen as long as >3 DMA are used. (No matter SCB slots reallocation)

I wonder what is the real reason ?  Have you ever handle the same case?

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