In my porting OS, I found memory address only have 0x1000 0000~0x1002 ffff can be written,
the other half 0x1003 0000~0x1006 0000 can not be written in "L1 Code SRAM" and only have
0x2003 0000~0x2006 0000 can be written, the other half 0x2000 0000~0x2002 ffff can not be written
in "L1 Main SRAM Data" in ADSP-CM408f ez-kit.
Please why? Now sram is not enough(exceed 192k) if only use half in my program.
There are 64KB x 6 banks in CM408f. You need to configure the SRAM Config register in case you want to modify the configuration via .MAC file in IAR. Please go through the comments in C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\config\linker\AnalogDevices - CM40z_384_2048.icf and "Cortex-M4 Code and Data SRAM" section in Hardware Ref Manual.