I am interested in creating a new design with one of the following two ADI microcontrollers:
1) ADSP-CM407F: 2MB flash, 384KB SRAM
2) ADSP-CM409F: 2MB flash, 384KB SRAM
I would like to use the microcontroller as follows:
1) The microcontroller boots from the internal flash memory and informs the host that it is ready.
2) The host programs the desired application code into the microcontroller embedded SRAM.
3) The host steps the microcontroller program counter which starts executing from the code stored in the embedded SRAM.
We typically use this method of code execution because:
1) The host needs to be able to change the application code quickly (on the fly) without having to reprogram the flash each time.
2) Our application code is generally quiet small (~128KB).
3) The host is in control of which application code is running.
My question is this:
1) Provided the application code is small enough, is it possible for the ADSP-CM40x microcontrollers to execute from instruction code stored in it's own embedded SRAM?
You can configure the SRAM banks for Code and Data as required. Please see the Hardware Reference Manual, ARM Cortex-M4 Core Memory Sub-System chapter and the SRAM_CFG register specifically.