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ADSP-2156x
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ADSP-2156x
Documents Graphical Demonstration of ADSP-2156x FIR/IIR Accelerator Performance and Real Time Usage
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  • Graphical Demonstration of ADSP-2156x FIR/IIR Accelerator Performance and Real Time Usage
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Graphical Demonstration of ADSP-2156x FIR/IIR Accelerator Performance and Real Time Usage

ADSP-2156x is the first 1 GHz single-core Digital Signal Processor in the SHARC®+ family of processors. ADSP-2156x incorporates high-performance FIR and IIR hardware accelerators. These accelerators can be run in tandem with the core to perform FIR and/or IIR processing, thereby increasing the overall processing capability of the processor. There are several functional and performance improvements on ADSP-2156x accelerators compared to its predecessors.

This document provides a package of two GUIs  to graphically demonstrate the performance of these accelerators and their usage in real time with different accelerator usage models. 

GUI1: ADSP-2156x FIR/IIR Accelerator Performance: This GUI can be used to visualize the expected performance of ADSP-2156x FIR/IIR accelerators for a given use case. This GUI generates the plots for ADSP-2156x FIR/IIR accelerator performance numbers for a given set of parameters such as block size, no. of taps/biquads, no. of channels, sample rate values, etc. Along with the ADSP-2156x accelerators, other target cases such as SHARC+ core only, ADSP-SC57x/SC58x/214xx accelerators and SHARC V (214xx) core are also covered for the sake of comparison. Different measurement unit options such as core cycles, time, MIPS, compute efficiency, and performance improvement factor are supported as well. The GUI uses data measured on the eval boards for different parameters and stored offline to generate the plots.

GUI2: ADSP-2156x Accelerator Usage Models: This GUI demonstrates and compares different ADSP-2156x audio accelerator usage models in real time for different audio processing use cases. The real time use cases are run on the ADSP-21569 EZ-Kit. The GUI communicates with the EZ-Kit over UART to display the real-time information such as core and accelerator MIPS, core MIPS saving, and additional latency. The GUI can also be used to switch between the accelerator use cases and usage models dynamically.

The software package can be downloaded from this link: ADSP-2156x Accelerator Performance GUI. The package also contains a user guide which can be used as reference while using these GUIs. 

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