DAI Clarifications - Errors in HRM version 0.2

I have been reviewing the DAI section of the ADSP-2156x HRM and I believe I have found a few mistakes.

In the Cross Mode Connections - Shared Clock description (pg 21-9), DAI0_PIN03 & DAI1_PIN03 are referenced. I believe that DAI0_PIN05 & DAI_PIN1_PIN05 have the same functionality. This would be consistent with Table 21-6, but not Table 21-7. I think that Table 21-7 is wrong too in A-Clocks. It should also include DA1 CRS buffer 5. This would be consistent with the register definitions.

In the Cross Mode Connections Shared FS description (pg 21-10), DAI0_PIN04 & DAI1_PIN04 are referenced. I believe that DAI0_PIN06 & DAI_PIN1_PIN06 have the same functionality. This would be consistent with Table 21-6 and Table 21-7. 

Fig 21-5 is a clone of Fig 21-6 and is therefore wrong. Pin Buffer Enable should be Low and the External Pin Direction is pointed the wrong direction.

I am assuming the following is true:

  • DAI0 & DAI1 are essentially identical in functionality with mirrored cross connections.
  • DAI3 & DAI5 have the same cross connection functionality (Clock Source to the other DAI)
  • DAI4 & DAI6 have the same cross connection functionality (FS Source to the other DAI)
  • To use the PCG from the other DAI, you route this to a Group D Pin Buffer. This Pin Buffer can then be the Source for a Group A or C Destination. This signal will also be available at the corresponding external DAI Pin

I realize that it is very difficult to write a 2000 page mistake free manual and as early adopters, we deal with this. I just want to make sure that my read of the inconsistencies is correct. Is there a manual errata?

Al



Added one more assumption (bullet 4)
[edited by: AlClark at 3:50 PM (GMT 0) on 10 Apr 2020]
  • 0
    •  Analog Employees 
    on Mar 9, 2021 10:43 AM

    Hi,

    Apologies for delayed response.

    Regarding, "This would be consistent with Table 21-6, but not Table 21-7. I think that Table 21-7 is wrong too in A-Clocks. It should also include DA1 CRS buffer 5. This would be consistent with the register definitions.
    In the Cross Mode Connections Shared FS description (pg 21-10), DAI0_PIN04 & DAI1_PIN04 are referenced. I believe that DAI0_PIN06 & DAI_PIN1_PIN06 have the same functionality. This would be consistent with Table 21-6 and Table 21-7.  "

    >> Yes, It should include DAI1 CRS buffer 5.
    >>The DAI allows a few signals to be interconnected across DAI units. These connections are commonly referred as cross mode connections. These cross mode connections are useful for the system designer to share signals across both DAI’s so that                synchronization can be achieved on the peripheral modules across DAI0 and DAI1.
    >> The cross mode connection can be used to share a clock signal, frame sync cross DAIs. This cross mode connection can be used to connect PCG output signals of one DAI to pin buffers of other DAI. We can use DAI CRS pin buffer routing 3, 5, 4 and 6 at the    same time.
    >> We suggest you refer "DAI Sources Overview" for DAI0 and DAI1 in ADSP-2156x Hrm from below download link.
         www.analog.com/.../adsp-2156x_hwr.pdf
    >> In Griffin the CRS signal used the same selection code as used for DAI pin 1. But in GUL, this problem is not there.  We can use DAI pin buffer 12-1 and 20–19. The GUL HRM will be corrected accordingly in the future release/version.

    Regards,
    Anand Selvaraj.