2010-10-19 05:11:16     bf537 u-boot loading issue

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2010-10-19 05:11:16     bf537 u-boot loading issue

Muhammad Ali (PAKISTAN)

Message: 94727   

 

Hi,

 

I am trying to load u-boot on newly stuffed blackfin bf537.

 

I am using UrJtag with Wiggler for the purpose.

 

 

 

after initialization of stack and loading u-boot through JTAg, if I just run (Continue) the gdb i get the u-boot prompt on my serial program. But if i choose to do "memset" on specific regions of _bss_start and _bss_end depending on the system map for that particular u-boot i instantly get the following msgs. then i have to reset teh whole thing.

 

What causes this behaviour  ?

 

info:      bfin: [0] a double fault has occured EMUPC [0xEF000000]

error:     bfin: [0] CORE FAULT core cannot read register [14]

error:     bfin: [0] CORE FAULT core cannot read register [0]

error:     bfin: [0] CORE FAULT core cannot read register [1]

error:     bfin: [0] CORE FAULT core cannot read register [2]

error:     bfin: [0] CORE FAULT core cannot read register [3]

error:     bfin: [0] CORE FAULT core cannot read register [4]

error:     bfin: [0] CORE FAULT core cannot read register [5]

error:     bfin: [0] CORE FAULT core cannot read register [6]

error:     bfin: [0] CORE FAULT core cannot read register [7]

error:     bfin: [0] CORE FAULT core cannot read register [8]

error:     bfin: [0] CORE FAULT core cannot read register [9]

error:     bfin: [0] CORE FAULT core cannot read register [10]

error:     bfin: [0] CORE FAULT core cannot read register [11]

error:     bfin: [0] CORE FAULT core cannot read register [12]

error:     bfin: [0] CORE FAULT core cannot read register [13]

error:     bfin: [0] CORE FAULT core cannot read register [15]

error:     bfin: [0] CORE FAULT core cannot read register [16]

error:     bfin: [0] CORE FAULT core cannot read register [17]

error:     bfin: [0] CORE FAULT core cannot read register [18]

error:     bfin: [0] CORE FAULT core cannot read register [19]

error:     bfin: [0] CORE FAULT core cannot read register [20]

error:     bfin: [0] CORE FAULT core cannot read register [21]

error:     bfin: [0] CORE FAULT core cannot read register [22]

error:     bfin: [0] CORE FAULT core cannot read register [23]

error:     bfin: [0] CORE FAULT core cannot read register [24]

error:     bfin: [0] CORE FAULT core cannot read register [25]

error:     bfin: [0] CORE FAULT core cannot read register [26]

error:     bfin: [0] CORE FAULT core cannot read register [27]

error:     bfin: [0] CORE FAULT core cannot read register [28]

error:     bfin: [0] CORE FAULT core cannot read register [29]

error:     bfin: [0] CORE FAULT core cannot read register [30]

error:     bfin: [0] CORE FAULT core cannot read register [31]

error:     bfin: [0] CORE FAULT core cannot read register [32]

error:     bfin: [0] CORE FAULT core cannot read register [33]

error:     bfin: [0] CORE FAULT core cannot read register [34]

error:     bfin: [0] CORE FAULT core cannot read register [35]

error:     bfin: [0] CORE FAULT core cannot read register [36]

error:     bfin: [0] CORE FAULT core cannot read register [37]

error:     bfin: [0] CORE FAULT core cannot read register [38]

error:     bfin: [0] CORE FAULT core cannot read register [39]

error:     bfin: [0] CORE FAULT core cannot read register [40]

error:     bfin: [0] CORE FAULT core cannot read register [41]

error:     bfin: [0] CORE FAULT core cannot read register [42]

error:     bfin: [0] CORE FAULT core cannot read register [43]

error:     bfin: [0] CORE FAULT core cannot read register [44]

error:     bfin: [0] CORE FAULT core cannot read register [45]

error:     bfin: [0] CORE FAULT core cannot read register [46]

error:     bfin: [0] CORE FAULT core cannot read register [47]

error:     bfin: [0] CORE FAULT core cannot read register [48]

error:     bfin: [0] CORE FAULT core cannot read register [49]

error:     bfin: [0] CORE FAULT core cannot read register [50]

error:     bfin: [0] CORE FAULT core cannot read register [51]

error:     bfin: [0] CORE FAULT core cannot read register [52]

error:     bfin: [0] CORE FAULT core cannot read register [54]

error:     bfin: [0] CORE FAULT core cannot read register [55]

error:     bfin: [0] CORE FAULT core cannot read register [56]

error:     bfin: [0] CORE FAULT core cannot read register [57]

error:     bfin: [0] CORE FAULT core cannot read register [58]

error:     bfin: [0] CORE FAULT core cannot read register [59]

error:     bfin: [0] CORE FAULT core cannot read register [60]

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2010-10-19 15:49:45     Re: bf537 u-boot loading issue

Mike Frysinger (UNITED STATES)

Message: 94740   

 

you need to validate your SDRAM works first

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2010-10-20 12:55:25     Re: bf537 u-boot loading issue

Muhammad Ali (PAKISTAN)

Message: 94782   

 

the ram settings were fine... i removed the series terminations and it worked fine.

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2011-09-21 21:10:32     Re: bf537 u-boot loading issue

Taylor Braun-Jones (UNITED STATES)

Message: 103486   

 

Mike - I'm having the same issue as Muhammad - though I'm on a newly stuffed bf532 board and much less confident that my SDRAM is good. Do you have any sugguestions for how to verify the SDRAM works? Ideally something that will help pinpoint the problem if the SDRAM is not good. Thanks!

 

 

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2011-09-21 23:22:00     Re: bf537 u-boot loading issue

Aaron Wu (CHINA)

Message: 103488   

 

You may trying using cp.b and cmp.b in u-boot command line to verify if your SDRAM read/write is insane, by reading/write large blocks of data from one location to another and compare if they are the same, cover large amount of address space and do it repeatedly if necessary.

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2011-09-22 08:57:17     Re: bf537 u-boot loading issue

James Kosin (UNITED STATES)

Message: 103497   

 

U-Boot also has the mtest command.

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2011-09-22 15:33:06     Re: bf537 u-boot loading issue

Taylor Braun-Jones (UNITED STATES)

Message: 103500   

 

Aaron - thanks for the suggestion but my error comes before I am even able to load u-boot. After setting up SDRAM using the two step apprach described here:

 

http://docs.blackfin.uclinux.org/doku.php?id=bootloaders:u-boot:debugging#jtag_loading

 

 

 

I load u-boot (apparently successful) but when I try to clear it the .bss sections (step 5) with a memset command I get the error messages described above.

 

Are there some tricks for testing read/write of SDRAM at a lower level (e.g. JTAG)? I have a gnICE cable. Thanks!

 

 

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2011-09-23 03:17:19     Re: bf537 u-boot loading issue

Aaron Wu (CHINA)

Message: 103510   

 

Hi Jones,

 

I think trying memset to clear BSS is already very lowlevel SDRAM operation in u-boot and it get failed in your case, can't see other test way at this moment.

 

Muhammad solved  this problem by checking the hardware, removing the terminal resistors to adjust the hardware timming for DDR, you may try the same and other similar actions like adjust the DRAM timming control register. Should be something tricky, there are some general rules for DDR interface hardware layout, your hardware engineer  may consult to these rules and check if there are apparent flaws on your design.

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2011-09-23 15:24:12     Re: bf537 u-boot loading issue

Taylor Braun-Jones (UNITED STATES)

Message: 103518   

 

Aaron, thanks for the reply.

 

I am re-reading the hardware design checklis (EE-281) I see now that they recommend series termination resistors on ALL the SDRAM signals (data, address and control). I only included it on the SDRAM clock. I'll have to get my board hooked up to a scope to see what exactly is going on. Wish I had a hardware engineer to blame this on. In my case system, hardware, and software engineers are one in the same - me :-)

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