2011-04-08 14:07:21     u-boot BF561-0.5 spislave boot not working

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2011-04-08 14:07:21     u-boot BF561-0.5 spislave boot not working

stefan ten heggeler (NETHERLANDS)

Message: 99705   

 

Hello

 

I am trying to get U-Boot to load via BFIN_BOOT_SPI_SLAVE.  But it seems that the blackfin does not understand or handle the u-boot.ldr properly.  its will not continue and pull HWAIT down after the 1st header (4+10 bytes). Therefore i believe the header of the generated ldr file is not correct.

 

i did add (in the board/config.mk file):  LDR_FLAGS-BFIN_BOOT_SPI_SLAVE := --gpio 2

 

 

 

on our board we do not have Flash so i cannot write u-boot to the flash.

 

when i change the config to build for BFIN_BOOT_BYPASS and leave the Flash enabled via the AMGCTL macros i am able to boot the bf561 EzKit with the generated u-boot.bin by programming the flash.

 

 

 

Also I can boot via spislave with a visualdsp created ldr file, this application ran from the internal L1 ram.

 

 

 

now my question is did i forget to configure something in my u-boot config header ?

 

or has anyone successfully gotten a bf561-0.5 to load u-boot via spislave with the ldrfile generated by bfin-uclinux-ldr ?

 

or is it possible to convert the u-boot (elf) to a format which i can use with the visualdsp elfloader.exe ?

 

 

 

any help or pointers are appreciated !

 

Thanks, Stefan

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2011-04-10 22:48:02     Re: u-boot BF561-0.5 spislave boot not working

Aaron Wu (CHINA)

Message: 99731   

 

Hi Stefan,

 

Let alone the details, are you trying to boot the u-boot on a BF561 board from some SPI storage device like SPI flash? is that your goal? Thanks for the clarification.

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2011-04-10 23:30:03     Re: u-boot BF561-0.5 spislave boot not working

Mike Frysinger (UNITED STATES)

Message: 99732   

 

there is no support for using VDSP tools

 

look at the ldr produced by VDSP and see what flags it sets:

bfin-elf-ldr -qs vdsp.ldr

 

then compare it to the LDR that u-boot is producing.  figure out what options you forgot to put into your board config.mk.

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2011-04-11 10:22:19     Re: u-boot BF561-0.5 spislave boot not working

stefan ten heggeler (NETHERLANDS)

Message: 99751   

 

Thanks for the feedback.

 

I'm trying to boot the blackfin in SPI_SLAVE mode,  a microcontroller is delivering the bootstream.

 

at the moment I'm figuring out the ldr blocks and check if they are OK.  after reading the blackfin documentation about ldr files a bit more in detail i figured out that the first block in de ldr  should only contain the byte count of the dxe and be ignored.

 

the ldr generated by bfin-elf-ldr does not have this initial block and also has an additional flags set not available for the bf561.

 

working header: DE 00 00 A0  00 00 A0 FF 04 00 00 00 50 00 __ __ __ __

 

u-boot header:   DE 00 00 A0  00 00 A0 FF 8C 01 00 00 4A 00 __ __ __ __ ... (more than just a byte count and not ignored)

 

 

 

i will try to add the first block by hand and see if it at least starts reading the whole stream of data from the microcontroller.

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2011-04-11 10:36:34     Re: u-boot BF561-0.5 spislave boot not working

stefan ten heggeler (NETHERLANDS)

Message: 99753   

 

i've manually added the first dxe header containing only the byte count of the dxe.

 

this solved the problem, started immediately to my u-boot prompt.

 

 

 

thus now i have another question..  how can i make bfin-elf-ldr add this first header ?

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2011-04-11 16:04:21     Re: u-boot BF561-0.5 spislave boot not working

Mike Frysinger (UNITED STATES)

Message: 99766   

 

post the full output of `bfin-elf-ldr -qs` on both LDRs and post the exact commands you're using to create both LDRs

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2011-04-12 03:24:01     Re: u-boot BF561-0.5 spislave boot not working

stefan ten heggeler (NETHERLANDS)

Message: 99775   

 

Ok, thanks..  hope you can help me fix this. to be able to continue i'm now simply adding the extra header.

 

The original u-boot.ldr is automatically created by the toolchain:

 

bfin-uclinux-ldr -T bf561-0.5 -c u-boot.ldr u-boot --bmode SPI_SLAVE --use-vmas --initcode arch/blackfin/cpu/initcode.o  --gpio 2

 

  LDR header: A00000DE ( 8-bit-flash wait:15 hold:3 spi:500K )

  DXE 1 at 0x00000000:

              Offset      Address     Bytes    Flags

    Block  1 0x00000000: 0xFFA00000 0x0000018C 0x004A ( gpio2 resvect init )

    Block  2 0x00000196: 0xFFA00000 0x0000000C 0x0042 ( gpio2 resvect )

    Block  3 0x000001AC: 0x03F80000 0x00008000 0x0042 ( gpio2 resvect )

    Block  4 0x000081B6: 0x03F88000 0x00008000 0x0042 ( gpio2 resvect )

    Block  5 0x000101C0: 0x03F90000 0x00008000 0x0042 ( gpio2 resvect )

    Block  6 0x000181CA: 0x03F98000 0x00001514 0x0042 ( gpio2 resvect )

    Block  7 0x000196E8: 0xFFA0000C 0x00000028 0x0042 ( gpio2 resvect )

    Block  8 0x0001971A: 0x03F9953C 0x00037B28 0x8043 ( gpio2 zerofill resvect final )

 

 

I used the above output to calculate the the total byte count and inserted these 14 extra bytes just after the global header.

 

00 00 A0 FF 04 00 00 00 50 00 42 12 05 00  << the bytecount header

 

 

The customized u-boot.ldr looks like this after dumping it with bfin-elf-ldr --qs u-boot.ldr:

 

LDR header: A00000DE ( 8-bit-flash wait:15 hold:3 spi:500K )

  DXE 1 at 0x00000000:

              Offset      Address     Bytes    Flags

    Block  1 0x00000000: 0xFFA00000 0x00000004 0x0050 ( gpio2 ignore )    << the is the bytecount header

    Block  2 0x0000000E: 0xFFA00000 0x0000018C 0x004A ( gpio2 resvect init )

    Block  3 0x000001A4: 0xFFA00000 0x0000000C 0x0042 ( gpio2 resvect )

    Block  4 0x000001BA: 0x03F80000 0x00008000 0x0042 ( gpio2 resvect )

    Block  5 0x000081C4: 0x03F88000 0x00008000 0x0042 ( gpio2 resvect )

    Block  6 0x000101CE: 0x03F90000 0x00008000 0x0042 ( gpio2 resvect )

    Block  7 0x000181D8: 0x03F98000 0x00001514 0x0042 ( gpio2 resvect )

    Block  8 0x000196F6: 0xFFA0000C 0x00000028 0x0042 ( gpio2 resvect )

    Block  9 0x00019728: 0x03F9953C 0x00037B28 0x8043 ( gpio2 zerofill resvect final )

 

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2011-04-12 17:56:32     Re: u-boot BF561-0.5 spislave boot not working

Mike Frysinger (UNITED STATES)

Message: 99799   

 

in reading the loader manual, it says that there should be a block containing the block count for the whole dxe.  but the bootrom source doesnt seem to care about this, and your additional block only declares 4 bytes.

 

only thing i can think of in reading the source is that the HWAIT flag is initialized only when an ignore block is seen in slave spi boot, so if the first block isnt an ignore block, the flag toggling isnt done correctly.

 

are you using PF2 for the HWAIT signal ?

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2011-04-13 03:35:31     Re: u-boot BF561-0.5 spislave boot not working

stefan ten heggeler (NETHERLANDS)

Message: 99813   

 

hello Mike that is correct i'm using PF2 for HWAIT.

 

and this pin is indeed not toggled when i do not have the first block/byte -count block as the first block.

 

 

 

my question still stands, is it possible to add this block automatically with the bfin-elf-ldr tool ?

 

i now add it manually via a hex editor.

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2011-04-13 21:53:52     Re: u-boot BF561-0.5 spislave boot not working

Mike Frysinger (UNITED STATES)

Message: 99825   

 

and the point of my queries to figure out the best/correct solution.  i'm not going to go tossing any random bits of code into ldr-utils just so that your one case starts passing.

 

if you get the latest svn ldr-utils code and apply the attached patch, do things work ?

 

ldr-utils-bf561-slave-spi.patch

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2011-04-14 14:05:50     Re: u-boot BF561-0.5 spislave boot not working

stefan ten heggeler (NETHERLANDS)

Message: 99856   

 

Thanks Mike !

 

i will try it and let you know as soon as possible, can't promise that it will be tomorrow but definitely within the next week.

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2011-04-15 17:35:42     Re: u-boot BF561-0.5 spislave boot not working

stefan ten heggeler (NETHERLANDS)

Message: 99897   

 

Well i applied the patch you posted, but it did not work.

 

the extra header looked like this:

 

40 00 A0 FF 00 00 00 00 52 00

 

 

i changed it to have 4 bytes of data:

 

40 00 A0 FF 04 00 00 00 52 00 00 00 00 00

[ address ] [bytecount] [flg] [  data   ]

 

 

the output of ldr -qs is the following:

LDR header: A00000DE ( 8-bit-flash wait:15 hold:3 spi:500K )

  DXE 1 at 0x00000000:

              Offset      Address     Bytes    Flags

    Block  1 0x00000000: 0xFFA00040 0x00000004 0x0052 ( gpio2 resvect ignore )

    Block  2 0x0000000E: 0xFFA00000 0x0000018C 0x004A ( gpio2 resvect init )

    Block  3 0x000001A4: 0xFFA00000 0x0000000C 0x0042 ( gpio2 resvect )

    Block  4 0x000001BA: 0x03F80000 0x00008000 0x0042 ( gpio2 resvect )

    Block  5 0x000081C4: 0x03F88000 0x00008000 0x0042 ( gpio2 resvect )

    Block  6 0x000101CE: 0x03F90000 0x00008000 0x0042 ( gpio2 resvect )

    Block  7 0x000181D8: 0x03F98000 0x00001468 0x0042 ( gpio2 resvect )

    Block  8 0x0001964A: 0xFFA0000C 0x00000028 0x0042 ( gpio2 resvect )

    Block  9 0x0001967C: 0x03F99490 0x00037B28 0x8043 ( gpio2 zerofill resvect final )

 

 

with the added 4 bytes of data in the first block (even though it is all zero's) the blackfin boots from spi and pull's HWAIT down.

 

next week i might have a better look at the patch you posted, maybe i can figure out how to add the header with some data.

 

i also have another issue.. i need to be able to boot the uImage from an SD-card that is connected to the SPORT1.

and i only started working with the blackfin a few weeks ago, so still need to learn a lot.

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