2009-06-18 10:07:00     Porting U-boot to a custom board: few questions

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2009-06-18 10:07:00     Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 75972   

 

I'm porting U-Boot to a custom BF532 board with a SPI Flash.  I combined sources from EZ-KIT533, SRV1 and Minotaur to make my board files.  I have a terminal output, I can "play" in the menus, I can detect my SPI Flash (AT45DB321D) etc.  However, I still have some problems and questions that I can't resolve (even after a lot of research on the wiki, on the forums, etc.)

 

#1) The first time I changed the EZKIT-533 to adapt it to my board, I was able to get the frequencies I wanted (300, 300 and 60MHz).  I'm not able to get them anymore.  Whatever I configure, I'm always getting 250, 250 and 50MHz (reset default).  I suppose one of my included files redefine it?

 

#2) In all the projects that don't use a parallel flash but only a SPI one, there is CFG_BFIN_CMD_BOOTLDR in there #define CONFIG_BFIN_COMMANDS.  However, I can't compile it with this.  What does it do?

 

#3) When I remove the Flash, I use:

 

#define CONFIG_COMMANDS        (( CONFIG_BFIN_CMD| \

                CFG_CMD_ELF    | \

                CFG_CMD_CACHE  | \

                CFG_CMD_EEPROM | \

                CFG_CMD_DATE ) \

                & \

                ~(CFG_CMD_FLASH) \

                )

 

When doing so, I lose the majority of the commands I can do in U-boot.  I even lost 'eeprom'.  What should I add to this to get my eeprom commands?

 

#4) Where can I find a descriptions of the options of CONFIG_BFIN_COMMANDS?

 

Here is my config file:

 

/*

* U-boot - Configuration file for BF532 Gigamodule

* JFDuval - IntRoLab

 

 

* Flash image map:

*

* 0x00000000      u-boot bootstrap

* 0x00010000      environment

* 0x00020000      u-boot code

* 0x00030000      uImage.initramfs

*/

 

#ifndef __CONFIG_BF532_GIGA2_H__

#define __CONFIG_BF532_GIGA2_H__

 

#include <asm/blackfin-config-pre.h>

 

#define __ADSPLPBLACKFIN__        1

#define __ADSPBF532__            1

 

/*

* Processor Settings

*/

#define CONFIG_BFIN_CPU             bf532-0.5

#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS

 

#define CONFIG_SPI

#define CONFIG_DEBUG_EARLY_SERIAL 1

#define CONFIG_BAUDRATE            115200

#define CONFIG_ENV_OVERWRITE    1

 

// We don't have a parallel flash chip there

#define CFG_NO_FLASH

 

/*

* Clock Settings

*    CCLK = (CLKIN * VCO_MULT) / CCLK_DIV

*    SCLK = (CLKIN * VCO_MULT) / SCLK_DIV

*    Config = 300MHz, 300MHz and 60MHz

*/

/* CONFIG_CLKIN_HZ is any value in Hz                    */

#define CONFIG_CLKIN_HZ            25000000

/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN        */

/*                                                1 = CLKIN / 2        */

#define CONFIG_CLKIN_HALF        0

/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass    */

/*                                                1 = bypass PLL    */

#define CONFIG_PLL_BYPASS        0

/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL        */

/* Values can range from 0-63 (where 0 means 64)            */

#define CONFIG_VCO_MULT            12

/* CCLK_DIV controls the core clock divider                */

/* Values can be 1, 2, 4, or 8 ONLY                    */

#define CONFIG_CCLK_DIV            1

/* SCLK_DIV controls the system clock divider                */

/* Values can range from 1-15                        */

#define CONFIG_SCLK_DIV            5

 

/*

* Memory Settings

*/

#define CONFIG_MEM_SIZE        64

 

#define CONFIG_EBIU_SDRRC_VAL    0x01CF

#define CONFIG_EBIU_SDGCTL_VAL    0x809110CD

#define CONFIG_EBIU_SDBCTL_VAL    0x25

 

#define CONFIG_EBIU_AMGCTL_VAL    0xFF

#define CONFIG_EBIU_AMBCTL0_VAL    0xffc2ffc2

#define CONFIG_EBIU_AMBCTL1_VAL    0xffc2ffc2

 

#define CFG_MONITOR_LEN        (256 * 1024)    // Reserve 256 kB for monitor

#define CFG_MALLOC_LEN        (128 * 1024)    // Reserve 128 kB for malloc()

#define CFG_GBL_DATA_SIZE    0x4000

 

#define CONFIG_BOOTCOMMAND        "run flashboot"

#define CFG_PROMPT            "bfin-giga>"

 

/*

* Flash Settings

*/

/*

#define CFG_FLASH_BASE        0x20000000

 

#define CFG_MAX_FLASH_BANKS    3    // max number of memory banks

#define CFG_MAX_FLASH_SECT    40    // max number of sectors on one chip

 

//#define    CFG_ENV_IS_IN_FLASH    1

#define CFG_ENV_ADDR        0x20020000

#define FLASH_TOT_SECT        40

*/

 

//#define CFG_ENV_IS_IN_EEPROM    1

#define CFG_ENV_OFFSET        0x10000

#define CFG_ENV_HEADER        (CFG_ENV_OFFSET + 0x16e) /* 0x12A is the length of LDR file header */

 

#define CFG_ENV_SIZE                    0x10000

#define CFG_ENV_SECT_SIZE               0x10000 // Total Size of Environment Sector //

 

 

/* CONFIG_SPI_BAUD controls the SPI peripheral clock divider        */

/* Values can range from 2-65535                    */

/* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD)                */

#define CONFIG_SPI_BAUD            2

#define CONFIG_SPI_BAUD_INITBLOCK    4

#define CONFIG_SPI_SSEL            1

 

/*

* Misc Settings

*/

#define    CONFIG_MISC_INIT_R

#define CONFIG_RTC_BFIN

 

 

#define CONFIG_COMMANDS        (( CONFIG_BFIN_CMD| \

                 CFG_CMD_ELF    | \

                 CFG_CMD_CACHE  | \

                 CFG_CMD_EEPROM | \

                 CFG_CMD_DATE ) \

                 & \

                 ~(CFG_CMD_FLASH) \

                 )

 

//CFG_CMD_IMLS |

 

#define CONFIG_BFIN_COMMANDS \

    ( CFG_CMD_EEPROM | \

      CFG_BFIN_CMD_CPLBINFO )

 

/*

#define CONFIG_BFIN_COMMANDS \

    ( CFG_BFIN_CMD_BOOTLDR | \

      CFG_BFIN_CMD_CPLBINFO )

*/

 

#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw"

#define CONFIG_LOADADDR    0x1000000

 

# define BOOT_ENV_SETTINGS \

    "flashboot= eeprom read 0x1000000 0x30000 0x320000;" \

            "bootm 0x1000000\0"

 

#define CFG_MEMTEST_START    0x0    /* memtest works on */

#define CFG_MEMTEST_END        ( (CONFIG_MEM_SIZE - 1) * 1024*1024)    /* 1 ... 63 MB in DRAM */

#define    CFG_LOAD_ADDR        CONFIG_LOADADDR    /* default load address */

 

/*

* Pull in common ADI header for remaining command/environment setup

*/

#include <configs/bfin_adi_common.h>

 

#include <asm/blackfin-config-post.h>

 

#endif

 

 

 

 

Thanks a lot for your help. I'll write all my procedure in a good tutorial when I'll acheive my goal. JF

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2009-06-18 10:28:37     Re: Porting U-boot to a custom board: few questions

Mike Frysinger (UNITED STATES)

Message: 75975   

 

you didnt say what version of software you're using.  i'm going to assume 2008R1.5.

 

you didnt say how you were testing the clocks exactly.  the 2008R1.5 release did not reprogram things on the fly, so in order to properly test, you must burn the image into flash and reset the board.

 

if by chance the changes in source are correct but the binary isnt working, make sure to do `make clean` after changing anything in your board config header.

 

bootldr does what it sounds like -- allows you to boot LDR files.  however, the 2008R1.5 release doesnt support this function with the BF533 family, so dont bother enabling it.  it isnt related to flash type in any way.

 

you didnt add CONFIG_CMD_DFL to your CONFIG_COMMANDS so the majority are going to be disabled.

 

configs/bfin_adi_common.h really is meant for ADI boards as it sets up common defaults for our development boards.  if you want to customize things and trim down your configuration, you should not use it.

 

Blackfin specific commands are documented (sort of) in include/asm-blackfin/blackfin-config-pre.h.  however, i dont think you need any of those with your system.

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2009-06-18 11:53:30     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 75984   

 

Hello Mike,

 

Yes I'm using 2008R1.5.  I'm using a ICEBear JTAG with GDB/Insight to load my compiled U-Boot in RAM and run it.

 

When I remove all the Flash code, I can't boot anymore:

 

Early:start.S: Init Registers

                                               

Early:start.S: Relocate

                                                     

Early:start.S: Lower to 15

                                                  

Early: NOP Slide

                                                            

Early: Board init flash

                                                     

Early: Init CPLB tables

                                                     

Early: Exceptions setup

                                                     

Early: Turn on ICACHE

                                                       

Early: Turn on DCACHE

                                                       

Early: Init global data

                                                     

Early: IRQ init

                                                             

Early: Environment init

                                                     

DCPLB exception outside of memory map at 0xb1800000                                                                              

                                                                              

Ack! Something bad happened to the Blackfin!                      

                                                                              

                                                                              

Please reset the board

 

It seems that I'm not initialising my environment correctly...

 

#define CONFIG_ENV_OVERWRITE    1

 

#define CFG_ENV_IS_IN_EEPROM    1

#define CFG_ENV_OFFSET        0x10000

#define CFG_ENV_HEADER        (CFG_ENV_OFFSET + 0x16e) /* 0x12A is the length of LDR file header */

 

#define CFG_ENV_SIZE                 

  0x10000

#define CFG_ENV_SECT_SIZE               0x10000 // Total Size of Environment Sector //

#define CFG_ENV_IS_EMBEDDED

 

# define BOOT_ENV_SETTINGS \

    "flashboot= eeprom read 0x1000000 0x20000 0x320000;" \

            "bootm 0x1000000\0"

 

How am I supposed to configure the environment to have it in SPI Flash correctly?

 

Thanks,

 

JF

 

 

 

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2009-06-18 12:14:31     Re: Porting U-boot to a custom board: few questions

Mike Frysinger (UNITED STATES)

Message: 75987   

 

you need to use ENV_IS_EMBEDDED_CUSTOM when booting an LDR, not ENV_IS_EMBEDDED

 

although, you still havent said what version of software you're using and CFG_ENV_HEADER would suggest you're using the wrong one -- that define is not used in 2008R1.5+ as it was an ugly hack.

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2009-06-18 13:23:12     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 75991   

 

Hello Mike,

 

Yes I'm using 2008R1.5.  I'm using a ICEBear JTAG with GDB/Insight to load my compiled U-Boot in RAM and run it.

 

[...]

 

 

 

---

 

Hello Mike,

 

As I wrote, I'm using U-Boot 1.1.6-2008R1.5.  I commented out CFG_ENV_HEADER and I modified the environnement to CUSTOM.  Now I have a partially working U-Boot.  Here is the output:

 

Early:start.S: Init Registers

                                     

Early:start.S: Relocate

                                                     

Early:start.S: Lower to 15

                                                  

Early: NOP Slide

                                                            

Early: Board init flash

                                                     

Early: Init CPLB tables

                                                     

Early: Exceptions setup

                                                     

Early: Turn on ICACHE

                                                       

Early: Turn on DCACHE

                                                       

Early: Init global data

                                                     

Early: IRQ init

                                                             

Early: Environment init

                                                     

Early: Baudrate init

                                                        

Early: Serial init

                                                          

Early: Console init flash

                                                   

Early: End of early debugging

                                               

                             

                                             

                               

                                           

U-Boot 1.1.6 (ADI-2008R1.5) (Jun 17 2009 - 20:21:49)

                        

                                                    

                      

CPU:   ADSP bf532-0.5 (Detected Rev: 0.5)

                                   

                                         

                                 

Board: IntRoLab BF532 GigaModule v2

                                         

                                   

                                       

Clock: VCO: 250 MHz, Core: 250 MHz, System: 50 MHz

                          

RAM:   Serial Port initialized with Baud rate = 115200

                      

SDRAM attributes:

                                                           

tRCD 3 SCLK Cycles,tRP 3 SCLK Cycles,tRAS 6 SCLK CyclestWR 2 SCLK Cycles,CAS Lat

ency 3 SCLK cycles

                                                         

SDRAM Begin: 0x0

                                                            

Bank size = 64 MB

                                                           

64 MB

                                                                       

*** Warning - bad CRC, using default environment

                            

                                                

                          

In:    serial

                                                               

Out:   serial

                                                               

Err:   serial

                                                               

gd: 3f9c000

                                                                

|-flags: 3

                                                                 

|-board_type: 0

                                                            

|-baudrate: 115200

                                                         

|-have_console: 1

                                                          

|-ram_size: 0

                                                              

|-reloc_off: 0

                                                             

|-env_addr: 3fa000c

                                                        

|-env_valid: 1

                                                             

|-jt(3fb0168): 3fc3b78

                                                     

\-bd: 3f9c028

                                                              

   |-bi_baudrate: 1c200

                                                     

   |-bi_ip_addr: 0

                                                          

   |-bi_enetaddr: 0 0 0 0 0 0

                                               

   |-bi_boot_params: 0

                                                      

   |-bi_memstart: 0

                                                         

   |-bi_memsize: 4000000

                                                    

   |-bi_flashstart: 0

                                                       

   |-bi_flashsize: 0

                                                        

   \-bi_flashoffset: 0

                                                      

 

in-giga>help

                                                               

?       - alias for 'help'

                                                  

bootm   - boot application image from memory

                                

cplbinfo- display current CPLB tables

                                       

go      - start application at address 'addr'

                               

help    - print online help

                                                 

printenv- print environment variables

                                       

reset   - Perform RESET of the CPU

                                          

saveenv - save environment variables to persistent storage

                  

setenv  - set environment variables

                                         

version - print monitor version

                                             

bfin-giga>

 

Even if my config is:

 

#define CONFIG_COMMANDS        (( CONFIG_BFIN_CMD| \

                 CONFIG_CMD_DFL | \

                 CFG_CMD_ELF    | \

                 CFG_CMD_I2C    | \

                 CFG_CMD_CACHE  | \

                 CFG_CMD_EEPROM | \

                 CFG_CMD_DATE ) \

                 & \

                 ~(CFG_CMD_IMLS | CFG_CMD_FLASH) \

                 )

 

 

#define CONFIG_BFIN_COMMANDS \

    ( CFG_CMD_EEPROM | \

      CFG_BFIN_CMD_CPLBINFO )

 

I still have a short menu (without eeprom) and I have this CRC error about my environment.

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2009-06-18 13:45:16     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 75993   

 

Ok, I made some changes:

 

#define CONFIG_COMMANDS        (( CONFIG_BFIN_CMD| \

                 CFG_CMD_BDI    | \

                 CFG_CMD_RUN    | \

                 CFG_CMD_ELF    | \

                 CFG_CMD_CACHE  | \

                 CFG_CMD_EEPROM | \

                 CFG_CMD_DATE ) \

                 & \

                 ~(CFG_CMD_IMLS | CFG_CMD_FLASH) \

                 )

 

 

 

And I obtain what I want:

 

U-Boot 1.1.6 (ADI-2008R1.5) (Jun 17 2009 - 20:47:33)

                        

                                                    

                      

CPU:   ADSP bf532-0.5 (Detected Rev: 0.5)

                                   

                                         

                                 

Board: IntRoLab BF532 GigaModule v2

                                         

                                   

                                       

Clock: VCO: 250 MHz, Core: 250 MHz, System: 50 MHz

                          

RAM:   Serial Port initialized with Baud rate = 115200

                      

SDRAM attributes:

                                                           

tRCD 3 SCLK Cycles,tRP 3 SCLK Cycles,tRAS 6 SCLK CyclestWR 2 SCLK Cycles,CAS Lat

ency 3 SCLK cycles

                                                         

SDRAM Begin: 0x0

                                                            

Bank size = 64 MB

                                                           

64 MB

                                                                       

*** Warning - bad CRC, using default environment

                            

                                                

                          

In:    serial

                                                               

Out:   serial

                                                               

Err:   serial

                                                               

gd: 3f9c000

                                                                

|-flags: 3

                                                                 

|-board_type: 0

                                                            

|-baudrate: 115200

                                                         

|-have_console: 1

                                                          

|-ram_size: 0

                                                              

|-reloc_off: 0

                                                             

|-env_addr: 3fa000c

                                                        

|-env_valid: 1

                                                             

|-jt(3fb0168): 3fc4a80

                                                     

\-bd: 3f9c028

                                                              

   |-bi_baudrate: 1c200

                                                     

   |-bi_ip_addr: 0

                                                          

   |-bi_enetaddr: 0 0 0 0 0 0

                                               

   |-bi_boot_params: 0

                                                      

   |-bi_memstart: 0

                                                         

   |-bi_memsize: 4000000

                                                    

   |-bi_flashstart: 0

                                                       

   |-bi_flashsize: 0

                                                        

   \-bi_flashoffset: 0

                                                      

 

in-giga>help

                                                               

?       - alias for 'help'

                                                  

bdinfo  - print Board Info structure

                                        

bootelf - Boot from an ELF image in memory

                                  

bootm   - boot application image from memory

                                

bootvx  - Boot vxWorks from an ELF image

                                    

cplbinfo- display current CPLB tables

                                       

date    - get/set/reset date & time

                                         

dcache  - enable or disable data cache

                                      

eeprom  - EEPROM sub-system

                                                 

go      - start application at address 'addr'

                               

help    - print online help

                                                 

icache  - enable or disable instruction cache

                               

printenv- print environment variables

                                       

reset   - Perform RESET of the CPU

                                          

run     - run commands in an environment variable

                           

saveenv - save environment variables to persistent storage

                  

setenv  - set environment variables

                                         

version - print monitor version

                                             

 

in-giga>bdinfo

                                                             

U-Boot      = U-Boot 1.1.6 (ADI-2008R1.5) (Jun 17 2009 - 20:47:33)

          

CPU         = bf532-0.5

                                                     

Board       = bf532-giga2

                                                   

VCO         = 250 MHz

                                                       

CCLK        = 250 MHz

                                                       

SCLK        = 50 MHz

                                                        

boot_params = 0x00000000

                                                    

memstart    = 0x00000000

                                                    

memsize     = 0x04000000

                                                    

flashstart  = 0x00000000

                                                    

flashsize   = 0x00000000

                                                    

flashoffset = 0x00000000

                                                    

ethaddr     = 00:00:00:00:00:00

                                             

ip_addr     = 0.0.0.0

                                                       

baudrate    = 115200 bps

                                                    

 

in-giga>eeprom info

                                                        

SPI Device: AT45DB321x 0x1F (Atmel) 0x27 0x01

                               

Parameters: num sectors = 8192, sector size = 512, write size = 512

         

Flash Size: 32 mbit (4 mbyte)

                                               

Status: 0xB5

                                                                

bfin-giga> 

 

 

But I still got this CRC error...

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2009-06-18 15:10:41     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 75995   

 

Hello,

 

I have a new question.  I'm not starting a new thread because I think it may be relied to my CRC problem.  I want to boot from the SPI Flash.  When I load U-boot with GDB I get "Restoring binary file u-boot.bin into memory (0x100000 to 0x10bb14)" so, according to Section 5 (http://www.section5.ch/appnotes#adv_loaduboot) I calculate my image size in word: (0x10BB14 - 0x100000 +1 ) / 2 = 0x5D8A.

 

In U-boot, I saved my environment (with saveenv, it wrote to the eeprom) then I copied U-Boot in the SPI Flash "eeprom write 0x100000 0x20000 0x5D8A".  The problem is that if I reset the board, I don't get any sign of live on the terminal.  My boot mode is 11 and I can see communication on the SPI bus after a reset (clock + data on MISO and MOSI).

 

 

 

P.S.: I wan't to apologyse if I'm asking to much questions.  I'm a student and it's my first experience with Blackfin and U-boot.  I search a lot online before asking questions but I'm not always able to get the details I need.  Your help is greatly appreciated!  I feel that I'm near the goal of having a customized U-boot running on my own board!

 

 

 

JF

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2009-06-18 15:22:04     Re: Porting U-boot to a custom board: few questions

Mike Frysinger (UNITED STATES)

Message: 75996   

 

i cant really tell you anything about the icebear or using it.  you'll have to ask those guys about it.

 

for burning into flash, you dont need gdb.  use the serial port like normal.

http://docs.blackfin.uclinux.org/doku.php?id=bootloaders:u-boot:serial_port_loading_files

http://docs.blackfin.uclinux.org/doku.php?id=bootloaders:u-boot:serial-flash-eeprom

 

you dont need to worry about calculating file sizes or the environment location

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2009-06-18 16:24:39     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 75997   

 

Ok, I was able to send a file by the serial port but I still can't boot from it:

 

Early:start.S: Init Registers

Early:start.S: Relocate

Early:start.S: Lower to 15

Early: NOP Slide

Early: Board init flash

Early: Init CPLB tables

Early: Exceptions setup

Early: Turn on ICACHE

Early: Turn on DCACHE

Early: Init global data

Early: IRQ init

Early: Environment init

Early: Baudrate init

Early: Serial init

Early: Console init flash

Early: End of early debugging

 

 

U-Boot 1.1.6 (ADI-2008R1.5) (Jun 17 2009 - 22:47:14)

 

CPU:   ADSP bf532-0.5 (Detected Rev: 0.5)

 

Board: IntRoLab BF532 GigaModule v2

 

Clock: VCO: 250 MHz, Core: 250 MHz, System: 50 MHz

RAM:   Serial Port initialized with Baud rate = 115200

SDRAM attributes:

tRCD 3 SCLK Cycles,tRP 3 SCLK Cycles,tRAS 6 SCLK CyclestWR 2 SCLK Cycles,CAS Lat

ency 3 SCLK cycles

SDRAM Begin: 0x0

Bank size = 64 MB

64 MB

*** Warning - bad CRC, using default environment

 

In:    serial

Out:   serial

Err:   serial

gd: 3f9c000

|-flags: 3

|-board_type: 0

|-baudrate: 115200

|-have_console: 1

|-ram_size: 0

|-reloc_off: 0

|-env_addr: 3fa000c

|-env_valid: 1

|-jt(3fb0168): 3fc54a0

\-bd: 3f9c028

   |-bi_baudrate: 1c200

   |-bi_ip_addr: 0

   |-bi_enetaddr: 0 0 0 0 0 0

   |-bi_boot_params: 0

   |-bi_memstart: 0

   |-bi_memsize: 4000000

   |-bi_flashstart: 0

   |-bi_flashsize: 0

   \-bi_flashoffset: 0

bfin-giga>loadb

## Ready for binary (kermit) download to 0x01000000 at 115200 bps...

## Total Size      = 0x0000d5b0 = 54704 Bytes

## Start Addr      = 0x01000000

bfin-giga>bootm

## Booting image at 01000000 ...

Bad Magic Number

bfin-giga>

 

I sent the u-boot.ldr file that was generated while compiling U-Boot.

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2009-06-18 16:49:12     Re: Porting U-boot to a custom board: few questions

Mike Frysinger (UNITED STATES)

Message: 76000   

 

umm, you dont boot u-boot files.  you burn them into flash and let the cpu boot it.  plus, LDR files are not bootable u-boot images which is what bootm operates on.

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2009-06-19 10:28:10     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 76053   

 

Hello Mike,

 

Here is exactly what I did:

 

1) Compilation of a custom U-boot.

 

2) With GDB/Insight and an ICEBear, I loaded my u-boot.bin in RAM.  It runs fine (terminal output, I can see my board infos, my SPI flash, etc.)

 

3) With loadb, I loaded (serial port) u-boot.ldr that was generated in the compilation of U-Boot.

 

4) Writing to SPI Flash: eeprom write 0x1000000 0x0 0xD5B0 (0xD5B0 is the length of the file)

 

5) Reset of the board, then nothing...

 

I also tried eeprom write 0x1000000 0x20000 0xD5B0 without any difference.  I confirmed with a logic analyser that I write and read on the Flash.

 

Am I using the correct LDR file?  At what address in the Flash should I burn it?

 

 

 

Thanks,

 

 

 

JFDuval

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2009-06-19 14:38:10     Re: Porting U-boot to a custom board: few questions

Mike Frysinger (UNITED STATES)

Message: 76056   

 

you should simply use $(filesize) rather than trying to calculate it yourself

 

the address in memory is where you loaded it with loadb

 

you should also use eeprom read and read the file back to a different location so that you can use cmp.b to make sure it was written/read correctly

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2009-06-23 11:51:31     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 76199   

 

Hello Mike,

 

There was a problem with HyperTerminal+Kermit Protocol+loadb, my .ldr wasn't written correctly in SDRAM.  I used YModem and loady with success (md.b and opening the .ldr with hexdump are showing the same data).  Now my board can boot from the SPI Flash (a lot of transfert on the SPI bus) and I get a minimalist terminal output: "֐ƒ])äFIN>" or "ƒ])äFIN>".

 

I suppose that my GDBscripts are initialising something differently that my .ldr code alone, so I'll investigate this.

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2009-06-23 15:49:32     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 76209   

 

Hello,

 

While searching in the forum for known difference with the ICEBear loading, I found an interesting thread: http://blackfin.uclinux.org/gf/project/u-boot/forum/?action=ForumBrowse&forum_id=51&_forum_action=ForumMessageBrowse&thread_id=29939.

 

If I try the same thing, I get:

 

[U-Boot compilation...]

 

Creating LDR u-boot.ldr ...

Adding DXE 'u-boot' ... [initcode 812] [jump block] [ELF block: 57844 @ 0x03FC0000] [ELF block: 40 @ 0xFFA0800C] [ELF block: 6232 @ 0x03FCE21C] OK!

Done!

bfin-uclinux-objcopy --gap-fill=0xff -O srec u-boot.ldr u-boot.ldr.srec -I binary

bfin-uclinux-objcopy --gap-fill=0xff -O ihex u-boot.ldr u-boot.ldr.hex -I binary

debian:/home/user/Desktop/u-

boot-1.1.6-2008R1.5# bfin-elf-ldr u-boot.ldr

Showing LDR u-boot.ldr ...

  DXE 1 at 0x00000000:

    Block  1 at 0x00000000

         Addr: 0xFFA08000 Bytes: 0x0000032C Flags: 0x0008 ( init )

    Block  2 at 0x00000336

         Addr: 0xFFA08000 Bytes: 0x0000000C Flags: 0x0000 ( )

    Block  3 at 0x0000034C

         Addr: 0x03FC0000 Bytes: 0x00008000 Flags: 0x0000 ( )

    Block  4 at 0x00008356

         Addr: 0x03FC8000 Bytes: 0x000061F4 Flags: 0x0000 ( )

    Block  5 at 0x0000E554

         Addr: 0xFFA0800C Bytes: 0x00000028 Flags: 0x0000 ( )

    Block  6 at 0x0000E586

         Addr: 0x03FCE21C Bytes: 0x00001858 Flags: 0x8001 ( zerofill final )

 

Why don't I have a LDR header showing up?

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2009-06-23 15:56:03     Re: Porting U-boot to a custom board: few questions

Mike Frysinger (UNITED STATES)

Message: 76210   

 

i really dont know what you mean by "LDR header".  your output looks fine.

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2009-06-23 16:01:39     Re: Porting U-boot to a custom board: few questions

JF Duval (CANADA)

Message: 76211   

 

Hello Mike,

 

Refering to this post: http://blackfin.uclinux.org/gf/project/u-boot/forum/?action=ForumBrowse&forum_id=51&_forum_action=ForumMessageBrowse&thread_id=29939 Thomas Langås get:

 

Showing LDR u-boot.ldr ...

  LDR header: A00000DE ( 8-bit-flash wait:15 hold:3 spi:500K )

  DXE 1 at 0x00000000:

    Block  1 at 0x00000000

         Addr: 0xFFA00000 Bytes: 0x000003FC Flags: 0x000A ( resvect init )

 

And I don't get the header part.  However, since I know that my file is tranfered from flash to ram (Reference to my 2009-06-23 07:51:31 post) I suppose my LDR header is ok.

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2009-06-23 16:05:47     Re: Porting U-boot to a custom board: few questions

Mike Frysinger (UNITED STATES)

Message: 76212   

 

you arent using a BF561.  that guy is.  that LDR header is specific to the BF561.

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