2008-06-16 11:30:21     u-boot test failed but it can work after written to the flash

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2008-06-16 11:30:21     u-boot test failed but it can work after written to the flash

Jian Ju (HONG KONG)

Message: 57347   

 

Hi all,

 

My custom board has 1 pcs of M25P64 chip instead of a parallel flash, others are almost the same as the bf537 stamp board. u-boot has been compiled for the spi boot mode without error. The file (u-boot-bf537-spi.ldr) can boot up successfully after using eeprom write command to write it to the serial flash. However, I can't test it by using the go command.

 

It seems it was caused by some IVG7 error interrupts, but can we tell the reasons from the following output messages? (possibly serial port?)

 

bfin> tftp 0x1000000 u-boot-bf537-spi.ldr

Using Blackfin EMAC device

TFTP from server 158.132.179.228; our IP address is 158.132.179.45

Filename 'u-boot-bf537-spi.ldr'.

Load address: 0x1000000

Loading: ###########################

done

Bytes transferred = 134460 (20d3c hex)

bfin> go 0x1000000

## Starting application at 0x01000000 ...

 

 

 

Ack! Something bad happened to the Blackfin!

 

SEQUENCER STATUS:

SEQSTAT: 00000021  IPEND: 3fc00b2  SYSCFG: 0032

  HWERRCAUSE: 0x0

  EXCAUSE   : 0x21

  physical IVG7 asserted : <0x03fc0470> { _evt_default + 0x0 }

RETE: <0xa212030e> { ___smulsi3_highpart + 0x9e14b9b6 }

RETN: <0xf81296ca> { ___smulsi3_highpart + 0xf4154d72 }

RETX: <0x01000002> /* unknown address */

RETS: <0x03fc6fee> { _do_go + 0x62 }

PC  : <0x03fc00b2> { _start + 0xb2 }

DCPLB_FAULT_ADDR: <0xffe00004> { __etext_l1 + 0x3fffd4 }

ICPLB_FAULT_ADDR: <0x01000002> /* unknown address */

 

PROCESSOR STATE:

R0 : 00000001    R1 : 03f5becc    R2 : 03f5ba96    R3 : ffffffff

R4 : 00000000    R5 : 00000000    R6 : 03f5becc    R7 : 00000001

P0 : 00000007    P1 : 00000128    P2 : ffe00004    P3 : 00000002

P4 : 01000000    P5 : 03f5c000    FP : 03f5bcd4    SP : 03f5babc

LB0: 03fd4920    LT0: 03fd4914    LC0: 00000000

LB1: 03fcec46    LT1: 03fcec40    LC1: 00000000

B0 : 557b3b65    L0 : 00000000    M0 : 00000000    I0 : 01000000

B1 : d0c631cf    L1 : 00000000    M1 : 00000000    I1 : 03fe186e

B2 : a4cea397    L2 : 00000000    M2 : ff807ffc    I2 : 25b6b386

B3 : 25d237f7    L3 : 00000000    M3 : 00000000    I3 : 01ae5988

A0.w: 131009c2   A0.x: 00000000   A1.w: 00007975   A1.x: 00000000

USP : 60962702  ASTAT: 00001004

 

Hardware Trace:

   0 Target : <0x03fc0940> { _bfin_panic + 0x0 }

     Source : <0x03fc0b14> { _trap_c + 0x198 }

   1 Target : <0x03fc0b0a> { _trap_c + 0x18e }

     Source : <0x03fc0996> { _trap_c + 0x1a }

   2 Target : <0x03fc097c> { _trap_c + 0x0 }

     Source : <0x03fc0416> { _trap + 0x56 }

   3 Target : <0x03fc03c0> { _trap + 0x0 }

     Source : <0x01000000> /* unknown address */

   4 Target : <0x01000000> /* unknown address */

     Source : <0x03fc6fec> { _do_go + 0x60 }

   5 Target : <0x03fc6fe6> { _do_go + 0x5a }

     Source : <0x03fc01e2> { _dcache_disable + 0x1e }

   6 Target : <0x03fc01c4> { _dcache_disable + 0x0 }

     Source : <0x03fc6fe2> { _do_go + 0x56 }

   7 Target : <0x03fc6fde> { _do_go + 0x52 }

     Source : <0x03fc0104> { _dcache_status + 0x10 }

   8 Target : <0x03fc00f4> { _dcache_status + 0x0 }

     Source : <0x03fc6fda> { _do_go + 0x4e }

   9 Target : <0x03fc6fda> { _do_go + 0x4e }

     Source : <0x03fc00dc> { _icache_disable + 0x1c }

  10 Target : <0x03fc00c0> { _icache_disable + 0x0 }

     Source : <0x03fc6fd6> { _do_go + 0x4a }

  11 Target : <0x03fc6fd2> { _do_go + 0x46 }

     Source : <0x03fc00f0> { _icache_status + 0x10 }

  12 Target : <0x03fc00e0> { _icache_status + 0x0 }

     Source : <0x03fc6fce> { _do_go + 0x42 }

  13 Target : <0x03fc6fce> { _do_go + 0x42 }

     Source : <0x03fcc20a> { _printf + 0x42 }

  14 Target : <0x03fcc200> { _printf + 0x38 }

     Source : <0x03fd1bbc> { _serial_puts + 0x1c }

  15 Target : <0x03fd1bb0> { _serial_puts + 0x10 }

     Source : <0x03fd1b8c> { _serial_putc + 0x48 }

 

Please reset the board

 

### ERROR ### Please RESET the board ###

 

 

Thank you in advance,

 

JJ

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2008-06-16 15:48:54     Re: u-boot test failed but it can work after written to the flash

Mike Frysinger (UNITED STATES)

Message: 57352   

 

doing 'go' on an LDR will never work.  please review the documentation:

http://docs.blackfin.uclinux.org/doku.php?id=bootloaders:u-boot:compiling#binaries

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2008-06-17 10:03:24     回复: Re: u-boot test failed but it can work after written to the flash

Jian Ju (HONG KONG)

Message: 57410   

 

thank you, Mike. I just noticed that 'go' command is used for u-boot.bin ONLY.

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