2008-02-03 22:31:31     a question about CLKOUT of BF531 using u-boot-1.1.6

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2008-02-03 22:31:31     a question about CLKOUT of BF531 using u-boot-1.1.6

jinhua zhou (CHINA)

Message: 50623   

Hi,all

I have some problems about the BF531--silicon ver 0.5.

I modify u-boot-1.1.6 include/configs/bf533-ezkit.h file:

1: CLKIN = 25MHz

2: BFIN_BOOT_MODE = BF533_SPI_BOOT, using AT45DB161D SPI flash

3: BFIN_CPU = ADSP_BF531.

4: CONFIG_VCO_MULT = 16, CONFIG_CLKIN_HALF = 0, CONFIG_PLL_BYPASS = 0.

5: CONFIG_CCLK_DIV = 2, CONFIG_SCLK_DIV = 4.

6: CONFIG_MEM_SIZE = 16MB using MT48LC8M16A2TG

7: I use ADM811 to generate stable RESET Low pulse for BF531.

 

i get 100MHz clock from the pin CLKOUT after power up.

However, I found the SDRAM control signals(/CS,/CAS,/RAS,/WE)changed on the rising edge of CLKOUT,but not on the falling edge.This is conflicting with SDRAM timing and BF531/532/533 datasheet, so my SDRAM doesn't work properly.

 

Could you please give me some comments or suggestions about my problems?

 

Thank you so much.

 

Look forward to see you reply.

 

Best Regards,

huatui

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