FAQ: [#6706] 561 SMP kernel doesn't boot up now(2011)

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[#6706] 561 SMP kernel doesn't boot up now

Submitted By: Mingquan Pan

Open Date

2011-07-28 05:00:24     Close Date

2011-08-04 04:45:30

Priority:

Medium     Assignee:

steven miao

Status:

Closed     Fixed In Release:

N/A

Found In Release:

2011R1     Release:

Category:

N/A     Board:

N/A

Processor:

ALL     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Fixed

Uboot version or rev.:

    Toolchain version or rev.:

5013

App binary format:

N/A     

Summary: 561 SMP kernel doesn't boot up now

Details:

 

561 SMP kernel doesn't boot up now.

 

## Booting kernel from Legacy Image at 01000000 ...

   Image Name:   bf561-0.5-3.0.0-ADI-2011R1-pre-s

   Image Type:   Blackfin Linux Kernel Image (gzip compressed)

   Data Size:    3767695 Bytes = 3.6 MiB

   Load Address: 00001000

   Entry Point:  001bd144

   Verifying Checksum ... OK

   Uncompressing Kernel Image ... OK

Starting Kernel at = 001bd144

Linux version 3.0.0-ADI-2011R1-pre-svn10034 (test@uclinux65-561-SMP) (gcc version 4.3.5 (ADI-trunk/svn-5013) ) #6 SMP Tue Jul 26 20:58:01 GMT 2011

register early platform devices

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

  fixedcode = 0x00000400-0x00000490

  text      = 0x00001000-0x001350f0

  rodata    = 0x00135100-0x001911ac

  bss       = 0x00192000-0x001a3498

  data      = 0x001a34a0-0x001b6000

    stack   = 0x001b4000-0x001b6000

  init      = 0x001b6000-0x0070e000

  available = 0x0070e000-0x03f00000

  DMA Zone  = 0x03f00000-0x04000000

Hardware Trace active and enabled

Boot Mode: 0

Reset caused by Software reset

Blackfin support (C) 2004-2010 Analog Devices, Inc.

Compiled for ADSP-BF561 Rev 0.5

Blackfin Linux support by http://blackfin.uclinux.org/

Processor Speed: 600 MHz core clock and 100 MHz System Clock

NOMPU: setting up cplb tables

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

  External memory: cacheable in instruction cache

  L2 SRAM        : uncacheable in instruction cache

Data Cache Enabled for CPU0

  External memory: cacheable (write-through) in data cache

  L2 SRAM        : uncacheable in data cache

PERCPU: Embedded 7 pages/cpu @00793000 s4480 r8192 d16000 u32768

Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 16002

Kernel command line: root=/dev/mtdblock0 rw ip=10.100.4.50 earlyprintk=serial,uart0,57600 console=ttyBF0,57600

PID hash table entries: 256 (order: -2, 1024 bytes)

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 56648k/65536k RAM, (5472k init code, 1232k kernel code, 516k data, 1024k dma, 644k reserved)

Hierarchical RCU implementation.

NR_IRQS:153

Configuring Blackfin Priority Driven Interrupts

console [ttyBF0] enabled, bootconsole disabled

console [ttyBF0] enabled, bootconsole disabled

Calibrating delay loop... 1185.79 BogoMIPS (lpj=2371584)

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 512

Booting Core B.

Brought up 2 CPUs

Instruction Cache Enabled for CPU1

  External memory: cacheable in instruction cache

  L2 SRAM        : uncacheable in instruction cache

Data Cache Enabled for CPU1

  External memory: cacheable (write-through) in data cache

  L2 SRAM        : uncacheable in data cache

SMP: Total of 2 processors activated (2371.58 BogoMIPS).

 

Last passed time: 2011_Jul_18_05_00.

Uclinux-dist version: 10258.

Kernel verion: 10024, git-id: 22abb9b74bb13891e727d0b1cf57e888cfc02bca

 

Case 0 ...FAIL

 

Case 0 ...FAIL

 

 

Follow-ups

 

--- steven miao                                              2011-08-02 06:09:56

fix smp_send_reschedule() of bf561 smp, so that it can kick the idle cpu

 

--- Mingquan Pan                                             2011-08-04 04:45:30

Yes, the kernel for bf561 boots up ok now. Close.

 

 

 

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