FAQ: [#6543] bfin_ppi driver with EPPI gives LTERR_OVR (line track overflow error)(2011)

Document created by Aaronwu Employee on Sep 11, 2013
Version 1Show Document
  • View in full screen mode

[#6543] bfin_ppi driver with EPPI gives LTERR_OVR (line track overflow error)

Submitted By: Marius Kotsbak

Open Date

2011-04-13 05:08:30    

Priority:

Medium     Assignee:

Scott Jiang

Status:

Open     Fixed In Release:

N/A

Found In Release:

2010R1-RC5     Release:

Category:

Drivers     Board:

N/A

Processor:

BF548     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Assigned (Not Start)

Uboot version or rev.:

    Toolchain version or rev.:

09r1-11

App binary format:

N/A     

Summary: bfin_ppi driver with EPPI gives LTERR_OVR (line track overflow error)

Details:

 

Setting LINELEN to horizontal number of pixels using:

 

  ioctl(PPI_fd, CMD_PPI_LINELEN, xres);

 

like with PPI on BF537 gives:

 

"PPI Error: PPI Status = 0X4" in console.

 

A likely reason is that the meaning of the PPI_LINE register seems to have changed between PPI and EPPI. For PPI it was the number of pixels/pixel clocks between start and stop of the line valid sync, whereas in EPPI it seems to be between two starts of the line valid sync (including blanking pixel clocks etc):

 

http://analog.hosted.jivesoftware.com/message/5161?tstart=92

http://tech.section5.ch/news/?p=4

 

I have tried binary search for the right CMD_PPI_LINELEN to use, as with too high values I get underflow error instead, but I could not find a value that gives no errors, it seems to either give over- or underflow error.

 

I am not sure how the DMA controller should be programmed. If it still needs the x count of the actual pixels, I have not tried that, as using "CMD_PPI_LINELEN" sets that value too.

 

Also it might be that PPI_HCOUNT register should be programmed to the actual number of pixels (seems it is currently set automatically to PPI_LINE by the hardware).

 

Follow-ups

 

--- Scott Jiang                                              2011-04-29 05:55:13

Please show more details. data length, xfer type, port config, polarity,

internal or external trigger.

 

--- Marius Kotsbak                                           2011-04-29 09:15:52

Here is the config:

 

static IoctlCfgTable ppiMicronConfig[] = {

  { CMD_PPI_SKIPPING, CFG_PPI_SKIP_DISABLE },

  { CMD_PPI_DATALEN,  CFG_PPI_DATALEN_8 },

  { CMD_PPI_PACKING,  CFG_PPI_PACK_ENABLE },

  { CMD_PPI_CLK_EDGE, 0 }, // Sample both on falling edge

  { CMD_PPI_FSACTIVE_SELECT, 0 },  // 0 POLS

  { CMD_PPI_XFR_TYPE, CFG_PPI_XFR_TYPE_NON646 },

  { CMD_PPI_PORT_CFG, CFG_PPI_PORT_CFG_XSYNC23 },

  { CMD_PPI_SET_DIMS, CFG_PPI_DIMS_2D },

  { CMD_PPI_FIFOUWM, 0x00 },

  { CMD_PPI_FIFORWM, 0x00 },

  { CMD_PPI_DELAY, 0 },

  { 0, 0 }

};

 

External clock and sync lines.

 

 

 

    Files

    Changes

    Commits

    Dependencies

    Duplicates

    Associations

    Tags

 

File Name     File Type     File Size     Posted By

No Files Were Found

Attachments

    Outcomes