FAQ: [#6412] SRAM allocation test fail as sram-alloc-test is updated(2010)

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[#6412] SRAM allocation test fail as sram-alloc-test is updated

Submitted By: Vivi Li

Open Date

2010-12-20 22:05:19     Close Date

2011-01-20 01:14:55

Priority:

Medium     Assignee:

Sonic Zhang

Status:

Closed     Fixed In Release:

N/A

Found In Release:

2011R1     Release:

Category:

N/A     Board:

N/A

Processor:

ALL     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Fixed

Uboot version or rev.:

    Toolchain version or rev.:

gcc4.3-trunk

App binary format:

N/A     

Summary: SRAM allocation test fail as sram-alloc-test is updated

Details:

 

SRAM allocation test fail as sram-alloc-test coverage is extended significantly since uclinux-dist svn revision 9999.

 

 

--

Linux version 2.6.36.2-ADI-2011R1-pre-svn9530 (test@uclinux59-kernel-perf) (gcc version 4.3.5 (ADI-trunk/svn-5013) ) #34 Sat Dec0

register early platform devices

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Limiting kernel memory to 56MB due to anomaly 05000263

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

  fixedcode = 0x00000400-0x00000490

  text      = 0x00001000-0x00117e88

  rodata    = 0x00117e88-0x00174d9c

  bss       = 0x00175000-0x001856d0

  data      = 0x001856d0-0x00198000

    stack   = 0x00196000-0x00198000

  init      = 0x00198000-0x008ae000

  available = 0x008ae000-0x03800000

  DMA Zone  = 0x03f00000-0x04000000

Hardware Trace Active and Enabled

Boot Mode: 0

Blackfin support (C) 2004-2010 Analog Devices, Inc.

Compiled for ADSP-BF537 Rev 0.2

Blackfin Linux support by http://blackfin.uclinux.org/

Processor Speed: 500 MHz core clock and 125 MHz System Clock

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

  External memory: cacheable in instruction cache

Data Cache Enabled for CPU0

  External memory: cacheable (write-back) in data cache

Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 14224

Kernel command line: root=/dev/mtdblock0 rw clkin_hz=25000000 earlyprintk=serial,uart0,57600 console=ttyBF0,57600

PID hash table entries: 256 (order: -2, 1024 bytes)

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 47888k/65536k RAM, (7256k init code, 1115k kernel code, 513k data, 1024k dma, 7740k reserved)

Hierarchical RCU implementation.

        RCU-based detection of stalled CPUs is disabled.

        Verbose stalled-CPUs detection is disabled.

NR_IRQS:138

Configuring Blackfin Priority Driven Interrupts

console [ttyBF0] enabled, bootconsole disabled

console [ttyBF0] enabled, bootconsole disabled

Calibrating delay loop... 993.28 BogoMIPS (lpj=1986560)

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 512

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 48 KB (35 KB free)

NET: Registered protocol family 16

Blackfin DMA Controller

stamp_init(): registering device resources

bio: create slab <bio-0> at 0

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@7

Switching to clocksource bfin_cs_cycles

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 2048 (order: 2, 16384 bytes)

TCP bind hash table entries: 2048 (order: 1, 8192 bytes)

TCP: Hash tables configured (established 2048 bind 2048)

TCP reno registered

UDP hash table entries: 256 (order: 0, 4096 bytes)

UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)

NET: Registered protocol family 1

debug-mmrs: setting up Blackfin MMR debugfs

msgmni has been set to 93

io scheduler noop registered (default)

bfin-uart: Blackfin serial driver

bfin-uart.0: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

brd: module loaded

bfin_mii_bus: probed

bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=24)@sclk=125MHz)

bfin_mac bfin_mac.0: eth0: Blackfin on-chip Ethernet MAC driver, Version 1.1

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

TCP cubic registered

NET: Registered protocol family 17

rtc-bfin rtc-bfin: setting system clock to 1970-01-12 10:30:39 UTC (988239)

dma_alloc_init: dma_page @ 0x028f5000 - 256 pages at 0x03f00000

Freeing unused kernel memory: 7256k freed

                           _____________________________________

        a8888b.           / Welcome to the uClinux distribution \

       d888888b.         /       _     _                         \

       8P"YP"Y88        /       | |   |_|            __  __ (TM)  |

       8|o||o|88  _____/        | |    _ ____  _   _ \ \/ /       |

       8'    .88       \        | |   | |  _ \| | | | \  /        |

       8`._.' Y8.       \       | |__ | | | | | |_| | /  \        |

      d/      `8b.       \      \____||_|_| |_|\____|/_/\_\       |

     dP   .    Y8b.       \   For embedded processors including   |

    d8:'  "  `::88b        \    tèe Analog Devices Blackfin      /

   d8"         'Y88b        \___________________________________/

  :8P    '      :888

   8a.   :     _a88P         For further information, check out:

._/"Yaa_:   .| 88P|            - http://blackfin.uclinux.org/

\    YP"    `| 8P  `.          - http://docs.blackfin.uclinux.org/

/     \.___.d|    .'           - http://www.uclinux.org/

`--..__)8888P`._.'  jgs/a:f    - http://www.analog.com/blackfin

 

Have a lot of fun...

 

 

BusyBox v1.17.4 (2010-12-18 10:19:16 GMT) hush - the humble shell

 

root:/> sram_alloc

 

Testing L1_INST_SRAM on cpu 0 ...

sram_alloc(1, L1_INST_SRAM) = 0xffa032b8: PASS

sram_free(0xffa032b8) = 0: PASS

sram_alloc(1, L1_INST_SRAM) = 0xffa032b8: PASS

sram_free(0xffa032b8) = 0: PASS

sram_free(0xffa032b8) = -1: PASS

sram_alloc(0x1000000, L1_INST_SRAM) = (nil): PASS

sram_alloc(<all>, L1_INST_SRAM) = <9042 allocs>: PASS

sram_free(<all>) = 0: PASS

sram_alloc(1, L1_INST_SRAM) = 0xffa032b8: PASS

sram_free(0xffa032b8) = 0: PASS

 

Testing L1_DATA_A_SRAM on cpu 0 ...

sram_alloc(1, L1_DATA_A_SRAM) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

sram_alloc(1, L1_DATA_A_SRAM) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

sram_free(0xff800000) = -1: PASS

sram_alloc(0x1000000, L1_DATA_A_SRAM) = (nil): PASS

sram_alloc(<all>, L1_DATA_A_SRAM) = <4096 allocs>: PASS

sram_free(<all>) = 0: PASS

sram_alloc(1, L1_DATA_A_SRAM) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

 

Testing L1_DATA_B_SRAM on cpu 0 ...

sram_alloc(1, L1_DATA_B_SRAM) = 0xff900000: PASS

sram_free(0xff900000) = 0: PASS

sram_alloc(1, L1_DATA_B_SRAM) = 0xff900000: PASS

sram_free(0xff900000) = 0: PASS

sram_free(0xff900000) = -1: PASS

sram_alloc(0x1000000, L1_DATA_B_SRAM) = (nil): PASS

sram_alloc(<all>, L1_DATA_B_SRAM) = <4096 allocs>: PASS

sram_free(<all>) = 0: PASS

sram_alloc(1, L1_DATA_B_SRAM) = 0xff900000: PASS

sram_free(0xff900000) = 0: PASS

 

Testing L1_DATA_SRAM on cpu 0 ...

sram_alloc(1, L1_DATA_SRAM) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

sram_alloc(1, L1_DATA_SRAM) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

sram_free(0xff800000) = -1: PASS

sram_alloc(0x1000000, L1_DATA_SRAM) = (nil): PASS

sram_alloc(<all>, L1_DATA_SRAM) = <8192 allocs>: PASS

sram_free(<all>) = 0: PASS

sram_alloc(1, L1_DATA_SRAM) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

 

Testing L1_DATA_SRAM+A+B on cpu 0 ...

sram_alloc(1, L1_DATA_SRAM+A+B) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

sram_alloc(1, L1_DATA_SRAM+A+B) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

sram_free(0xff800000) = -1: PASS

sram_alloc(0x1000000, L1_DATA_SRAM+A+B) = (nil): PASS

sram_alloc(<all>, L1_DATA_SRAM+A+B) = <8192 allocs>: PASS

sram_free(<all>) = 0: PASS

sram_alloc(1, L1_DATA_SRAM+A+B) = 0xff800000: PASS

sram_free(0xff800000) = 0: PASS

 

Testing L2_SRAM on cpu 0 ...

sram_alloc(1, L2_SRAM) = <not available?>: SKIP

 

General tests on cpu 0 ...

sram_free(bad pointer) = 0: PASS

 

Parallel tests on all cpus ...

        pid 164 on cpu 0

        pid 165 on cpu 0

        pid 166 on cpu 0

        pid 167 on cpu 0

        pid 168 on cpu 0

        pid 169 on cpu 0

        pid 170 on cpu 0

        pid 171 on cpu 0

        pid 172 on cpu 0

        pid 173 on cpu 0

child exited with 65280: FAIL

child exited with 65280: FAIL

child exited with 65280: FAIL

child exited with 65280: FAIL

child exited with 65280: FAIL

child exited with 65280: FAIL

child exited with 65280: FAIL

child exited with 65280: FAIL

child exited with 65280: FAIL

child exited with 65280: FAIL

 

Test summary: some tests FAIL

 

root:/>

--

 

Follow-ups

 

--- Sonic Zhang                                              2011-01-04 04:17:54

Fixed.

 

--- Vivi Li                                                  2011-01-20 01:14:55

OK now. Close it.

 

 

 

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