FAQ: [#6055] Build bf561-ezkit SMP kernel failed at anomaly 05000491(2010)

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[#6055] Build bf561-ezkit SMP kernel failed at anomaly 05000491

Submitted By: Vivi Li

Open Date

2010-06-02 06:52:36     Close Date

2010-08-17 22:04:19

Priority:

Medium     Assignee:

Sonic Zhang

Status:

Closed     Fixed In Release:

N/A

Found In Release:

2010R1     Release:

Category:

N/A     Board:

EZKIT Lite

Processor:

BF561     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Fixed

Uboot version or rev.:

    Toolchain version or rev.:

gcc4.3-2010_Apr_07

App binary format:

N/A     

Summary: Build bf561-ezkit SMP kernel failed at anomaly 05000491

Details:

 

Build bf561-ezkit SMP kernel failed at anomaly 05000491.

When smp option is selected, we don't have CONFIG_CACHE_FLUSH_L1, so it fails..

 

--

arch/blackfin/mach-common/arch_checks.c:65:3: error: #error You need IFLUSH in L1 inst while Anomaly 05000491 applies^M

make[2]: *** [arch/blackfin/mach-common/arch_checks.o] Error 1^M

make[1]: *** [arch/blackfin/mach-common] Error 2^M

--

 

Follow-ups

 

--- Mike Frysinger                                           2010-06-02 20:20:25

until we get more feedback from design, this isnt going to change

 

--- Vivi Li                                                  2010-06-02 22:42:01

If this anomaly exists, we can not run SMP with bf561-ezkit now.

SMP test on bf561-ezkit will be stopped.

 

--- Mike Frysinger                                           2010-06-02 23:22:48

yep, that's correct.  but until we have information on how exactly to workaround

the anomaly, implementing stuff that will be removed later is a waste of time.

especially since support L1 inst isnt going to be easy on SMP systems.

 

--- Sonic Zhang                                              2010-06-22 02:14:17

Any update for anomaly 491 from the hardware team? If there is not a suitable

workaround except L1 memory, we may have to drop SMP support in 2010R1 release.

 

--- Robin Getz                                               2010-06-22 09:08:48

No updates so far. I'll poke the person again today.

 

Worst case is that a helper function in SDRAM is necessary - which determines

which core you are running on, and jumping to that core's L1.

 

-Robin

 

--- Sonic Zhang                                              2010-06-28 03:15:27

Robin,

 

I wonder if anomaly 491 is exactly the same IFLUSH issue we walked around by

run IFLUSH twice? Could you check with the hardware owner if this is a valid

walk around for anomaly 491?

 

 

--- Mike Frysinger                                           2010-06-28 12:52:04

it is the same issue.  the anomaly # came out of that iflush report.

 

--- Robin Getz                                               2010-06-28 17:44:17

Sonic:

 

IFLUSH twice isn't a workaround - it will work sometime, but not all times. The

only reliable workaround at this time is execute from L1.

 

-Robin

 

--- Sonic Zhang                                              2010-08-05 03:50:30

Fixed by executing iflush in different L1 address on different core in SMP

kernel.

 

--- Vivi Li                                                  2010-08-17 22:04:19

OK, close it.

 

 

 

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