FAQ: [#6034] Scratchpad application test failed with MPU kernel(2010)

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[#6034] Scratchpad application test failed with MPU kernel

Submitted By: Vivi Li

Open Date

2010-05-19 05:56:32     Close Date

2010-06-28 23:00:19

Priority:

Medium     Assignee:

Barry Song

Status:

Closed     Fixed In Release:

2010R1

Found In Release:

2010R1     Release:

Category:

N/A     Board:

N/A

Processor:

BF537     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Fixed

Uboot version or rev.:

    Toolchain version or rev.:

gcc4.3-2010_Jan_22

App binary format:

N/A     

Summary: Scratchpad application test failed with MPU kernel

Details:

 

Scratchpad application test failed on bf537-stamp MPU kernel for Data access CPLB protection violation.

 

On PC:

--

bfin-uclinux-gcc -g -o helloworld helloworld.c -Wl,-elf2flt

bfin-uclinux-flthdr -u -s 2000 helloworld

rcp helloworld root@10.100.4.50:/

--

 

On target:

--

Linux version 2.6.33.4-ADI-2010R1-pre-svn8718 (test@uclinux74-mpu) (gcc version 4.3.4 (ADI-trunk/svn-3815) ) #88 Tue May 18 17:50

register early platform devices

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

  fixedcode = 0x00000400-0x00000490

  text      = 0x00001000-0x00113230

  rodata    = 0x00113230-0x0016f3a8

  bss       = 0x00170000-0x00180420

  data      = 0x00180420-0x00192000

    stack   = 0x00190000-0x00192000

  init      = 0x00192000-0x00841000

  available = 0x00841000-0x03f00000

  DMA Zone  = 0x03f00000-0x04000000

Hardware Trace Active and Enabled

Boot Mode: 0

Reset caused by Software reset

Blackfin support (C) 2004-2010 Analog Devices, Inc.

Compiled for ADSP-BF537 Rev 0.3

Blackfin Linux support by http://blackfin.uclinux.org/

Processor Speed: 500 MHz core clock and 125 MHz System Clock

MPU: setting up cplb tables with memory protection

Instruction Cache Enabled for CPU0

  External memory: cacheable in instruction cache

Data Cache Enabled for CPU0

  External memory: cacheable (write-back) in data cache

Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 16002

Kernel command line: root=/dev/mtdblock0 rw clkin_hz=25000000 earlyprintk=serial,uart0,57600 console=ttyBF0,57600 ip=10.100.4.50f

PID hash table entries: 256 (order: -2, 1024 bytes)

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 51656k/65536k RAM, (6844k init code, 1096k kernel code, 508k data, 1024k dma, 4408k reserved)

Hierarchical RCU implementation.

NR_IRQS:138

Configuring Blackfin Priority Driven Interrupts

console [ttyBF0] enabled, bootconsole disabled

console [ttyBF0] enabled, bootconsole disabled

Calibrating delay loop... 997.37 BogoMIPS (lpj=1994752)

Security Framework initialized

Mount-cache hash table entries: 512

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 48 KB (34 KB free)

NET: Registered protocol family 16

Blackfin DMA Controller

stamp_init(): registering device resources

bio: create slab <bio-0> at 0

Switching to clocksource bfin_cs_cycles

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 2048 (order: 2, 16384 bytes)

TCP bind hash table entries: 2048 (order: 1, 8192 bytes)

TCP: Hash tables configured (established 2048 bind 2048)

TCP reno registered

UDP hash table entries: 256 (order: 0, 4096 bytes)

UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)

NET: Registered protocol family 1

msgmni has been set to 100

io scheduler noop registered

io scheduler cfq registered (default)

bfin-uart: Blackfin serial driver

bfin-uart.0: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

brd: module loaded

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@7

bfin_mii_bus: probed

bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=24)@sclk=125MHz)

bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

TCP cubic registered

NET: Registered protocol family 17

rtc-bfin rtc-bfin: setting system clock to 2004-05-31 04:37:05 UTC (1085978225)

IP-Config: Complete:

     device=eth0, addr=10.100.4.50, mask=255.255.255.0, gw=10.100.4.174,

     host=bf537-stamp, domain=, nis-domain=(none),

     bootserver=10.100.4.174, rootserver=10.100.4.174, rootpath=

dma_alloc_init: dma_page @ 0x028b2000 - 256 pages at 0x03f00000

                           _____________________________________

        a8888b.           / Welcome to the uClinux distribution \

       d888888b.         /       _     _                         \

       8P"YP"Y88        /       | |   |_|            __  __ (TM)  |

       8|o||o|88  _____/        | |    _ ____  _   _ \ \/ /       |

       8'    .88       \        | |   | |  _ \| | | | \  /        |

       8`._.' Y8.       \       | |__ | | | | | |_| | /  \        |

      d/      `8b.       \      \____||_|_| |_|\____|/_/\_\       |

     dP   .    Y8b.       \   For embedded processors including   |

    d8:'  "  `::88b        \    the Analog Devices Blackfin      /

   d8"         'Y88b        \___________________________________/

  :8P    '      :888

   8a.   :     _a88P         For further information, check out:

._/"Yaa_:   .| 88P|            - http://blackfin.uclinux.org/

\    YP"    `| 8P  `.          - http://docs.blackfin.uclinux.org/

/     \.___.d|    .'           - http://www.uclinux.org/

`--..__)8888P`._.'  jgs/a:f    - http://www.analog.com/blackfin

 

Have a lot of fun...

 

 

BusyBox v1.16.1 (2010-05-18 12:20:43 GMT) hush - the humble shell

 

root:/> version

kernel:    Linux release 2.6.33.4-ADI-2010R1-pre-svn8718, build #88 Tue May 18 17:55:32 GMT 2010

toolchain: bfin-uclinux-gcc release gcc version 4.3.4 (ADI-trunk/svn-3815)

user-dist: release svn-9628, build #1666 Tue May 18 17:54:53 GMT 2010

root:/>

root:/> ./helloworld

Data access CPLB protection violation

<5> - Attempted read or write to Supervisor resource,

<5>   or illegal data memory access.

Deferred Exception context

CURRENT PROCESS:

COMM=helloworld PID=159  CPU=0

TEXT = 0x02ba8040-0x02bab680        DATA = 0x02bab6a0-0x02babf2c

BSS = 0x02babf2c-0x02bac180  USER-STACK = 0x02bad700

 

return address: [0x02ba9f4a]; contents of:

0x02ba9f20:  a06a  e300  0061  0c81  1804  9328  b069  6000

0x02ba9f30:  e801  0000  0485  0010  0568  3019  e800  0000

0x02ba9f40:  3008  601f  435a  200a  3211 [9910] 0810  1403

0x02ba9f50:  3001  2045  0c00  1842  6409  5439  0c00  17f5

 

ADSP-BF537-0.3 500(MHz CCLK) 125(MHz SCLK) (mpu on)

Linux version 2.6.33.4-ADI-2010R1-pre-svn8718 (test@uclinux74-mpu) (gcc version 4.3.4 (ADI-trunk/svn-3815) ) #88 Tue May 18 17:50

 

SEQUENCER STATUS:               Not tainted

SEQSTAT: 00002023  IPEND: 0008  IMASK: ffff  SYSCFG: 0006

  EXCAUSE   : 0x23

  physical IVG3 asserted : <0xffa0070c> { _trap + 0x0 }

RETE: <0x00000000> /* Maybe null pointer? */

RETN: <0x02050000> /* kernel dynamic memory */

RETX: <0x00000480> /* Maybe fixed code section */

RETS: <0x02ba9cf4> [ helloworld + 0x1cb4 ]

PC  : <0x02ba9f4a> [ helloworld + 0x1f0a ]

DCPLB_FAULT_ADDR: <0x02bad726> /* kernel dynamic memory */

ICPLB_FAULT_ADDR: <0x02ba9f4a> [ helloworld + 0x1f0a ]

PROCESSOR STATE:

R0 : 00000002    R1 : 02bad726    R2 : 0000002f    R3 : 0000002f

R4 : 02ba815c    R5 : 02bab660    R6 : 0000002f    R7 : 00000003

P0 : ffb00ef1    P1 : ffb00f7c    P2 : 02bad726    P3 : 00000000

P4 : 00000001    P5 : 02bad726    FP : ffb00efc    SP : 0204ff24

LB0: 02ba8eb5    LT0: 02ba8eb4    LC0: 00000000

LB1: 02a9203f    LT1: 02a92034    LC1: 00000000

B0 : 00000000    L0 : 00000000    M0 : 00000000    I0 : ffb00e91

B1 : 00000000    L1 : 00000000    M1 : 00000000    I1 : 00000000

B2 : 00000000    L2 : 00000000    M2 : 00000000    I2 : 00000000

B3 : 00000000    L3 : 00000000    M3 : 00000000    I3 : 00000000

A0.w: 00000000   A0.x: 00000000   A1.w: 00000000   A1.x: 00000000

USP : ffb00efc  ASTAT: 02003004

 

Hardware Trace:

   0 Target : <0x00003ed0> { _trap_c + 0x0 }

     Source : <0xffa006a0> { _exception_to_level5 + 0xa4 } JUMP.L

   1 Target : <0xffa005fc> { _exception_to_level5 + 0x0 }

     Source : <0xffa004b0> { _bfin_return_from_exception + 0x18 } RTX

   2 Target : <0xffa00498> { _bfin_return_from_exception + 0x0 }

     Source : <0xffa00554> { _ex_trap_c + 0x74 } JUMP.S

   3 Target : <0xffa0070c> { _trap + 0x0 }

      FAULT : <0x02ba9f4a> [ helloworld + 0x1f0a ] R0 = B[P2] (Z)

     Source : <0xffa0043c> { _ex_dcplb_miss + 0x78 } RTX

   4 Target : <0xffa003c4> { _ex_dcplb_miss + 0x0 }

     Source : <0xffa00767> { _trap + 0x5b }

   5 Target : <0xffa0070c> { _trap + 0x0 }

     Source : <0x02ba9f48> [ helloworld + 0x1f08 ] 0x3211

   6 Target : <0x02ba9f48> [ helloworld + 0x1f08 ]

     Source : <0x02ba9f5e> [ helloworld + 0x1f1e ] IF !CC JUMP pcrel (BP)

   7 Target : <0x02ba9f5a> [ helloworld + 0x1f1a ]

     Source : <0x02ba9f46> [ helloworld + 0x1f06 ] JUMP.S

   8 Target : <0x02ba9f38> [ helloworld + 0x1ef8 ]

     Source : <0x02ba9cf0> [ helloworld + 0x1cb0 ] CALL pcrel

   9 Target : <0x02ba9cec> [ helloworld + 0x1cac ]

     Source : <0x02ba9cd8> [ helloworld + 0x1c98 ] JUMP.S

  10 Target : <0x02ba9cc8> [ helloworld + 0x1c88 ]

     Source : <0x02ba9186> [ helloworld + 0x1146 ] CALL pcrel

  11 Target : <0x02ba9164> [ helloworld + 0x1124 ]

     Source : <0x02ba82a0> [ helloworld + 0x260 ] RTS

  12 Target : <0x02ba8294> [ helloworld + 0x254 ]

     Source : <0xffa0043c> { _ex_dcplb_miss + 0x78 } RTX

  13 Target : <0xffa003c4> { _ex_dcplb_miss + 0x0 }

     Source : <0xffa00766> { _trap + 0x5a } JUMP (P4)

  14 Target : <0xffa0070c> { _trap + 0x0 }

     Source : <0x02ba8292> [ helloworld + 0x252 ] 0x59f7

  15 Target : <0x02ba828e> [ helloworld + 0x24e ]

     Source : <0x02ba9000> [ helloworld + 0xfc0 ] RTS

Userspace Stack

Stack info:

SP: [0xffb00efc] <0xffb00efc> /* on-chip scratchpad */

Invalid stack pointer

SEGV

root:/>

--

 

Follow-ups

 

--- Mike Frysinger                                           2010-05-19 15:49:44

has this ever passed on the MPU kernel ?

 

--- Vivi Li                                                  2010-05-20 01:47:10

This bug was caught after my recent update of test script.

 

It failed several month ago, at least as early as March. It can pass with

09r1.1 release.

 

--- Barry Song                                               2010-06-12 04:28:17

One problem can be found is the fault address DCPLB_FAULT_ADDR and

ICPLB_FAULT_ADDR are not in L1 scratchpad. Then the reason doesn't come from L1

dcplb entry error.

 

Another problem is

SP: [0xffb00efc] <0xffb00efc> /* on-chip scratchpad */

Invalid stack pointer

0xffb00efc is reported as invalid stack. That should be wrong print from kernel

too.

 

Then check the reasons.

 

--- Robin Getz                                               2010-06-12 23:16:13

Barry:

 

The application does not go into L1 scratch - only the application stack.

 

With the exception of the "Invalid stack pointer" message (which I

can fix) - everything looks reasonable to me.

 

-Robin

 

--- Barry Song                                               2010-06-12 23:34:04

Yes. I don't mean application will go into L1. I mean the error doesn't happen

while accessing L1 stack(fault address is not L1), but in library or something

else.

-barry

 

--- Robin Getz                                               2010-06-12 23:57:43

>but in library or something else.

 

Right - so what is it? Did you replicate the problem on a recent kernel - the

updated trace dump might provide more insight - as would add2line of the

faulting instruction.

 

 

--- Mike Frysinger                                           2010-06-13 00:02:14

the scratchpad always has an implicit cplb entry granting everyone access, so

unless there is an entry that explicitly denies access, it should always work.

 

perhaps the problem is that stack is corrupted/exceeded causing a bad access

...

 

--- Barry Song                                               2010-06-18 00:40:10

The problem is argv, which is thinked to be in RAM not L1, can't be accessed in

uclibc_main -> strrstr -> strstr.

 

--- Barry Song                                               2010-06-18 00:41:29

Must adjust the SP+1 to point to argv in L1 when start_thread in kernel.

-barry

 

--- Barry Song                                               2010-06-18 04:35:11

Fixed and improved the L1 stack test, expected result is:

 

root:/> ./helloworld

Hello world!, 0xffb00f24

        TEST PASS, ./helloworld

-Barry

 

--- Vivi Li                                                  2010-06-21 03:48:27

OK now.

Close it.

 

--- Barry Song                                               2010-06-23 04:19:29

People are discussing a new solution. I reverted the fix, and re-open it.

-barry

 

--- Barry Song                                               2010-06-28 04:49:00

Fixed wrong page table, and new solution is placing strings in SDRAM. L1 stack

only hold param address and real data stack.

-barry

 

--- Vivi Li                                                  2010-06-28 22:57:28

OK, close it.

 

 

 

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