[#5220] spi flash on bf518f ezbrd doesnt seem to work (returns all 0xff's)

Document created by Aaronwu Employee on Sep 4, 2013
Version 1Show Document
  • View in full screen mode

[#5220] spi flash on bf518f ezbrd doesnt seem to work (returns all 0xff's)

Submitted By: Mingquan Pan

Open Date

2009-06-08 22:43:48     Close Date

2009-06-10 22:33:11

Priority:

Medium     Assignee:

Graf Yang

Status:

Closed     Fixed In Release:

N/A

Found In Release:

N/A     Release:

Category:

N/A     Board:

N/A

Processor:

BF518     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Fixed

Uboot version or rev.:

    Toolchain version or rev.:

09r1-r6

App binary format:

N/A     

Summary: spi flash on bf518f ezbrd doesnt seem to work (returns all 0xff's)

Details:

 

spi flash on bf518f ezbrd can't be recognized in kernel.

 

Starting Kernel at = 00198854

Linux version 2.6.28.10-ADI-2009R1-svn6594 (test@uclinux80-518f) (gcc version

4.1.2 (ADI svn)) #16 Mon Jun 8 16:49:17 GMT 2009

console [early_BFuart0] enabled

early printk enabled on early_BFuart0

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

  fixedcode = 0x00000400-0x00000490

  text      = 0x00001000-0x001147e0

  rodata    = 0x001147e0-0x00169d5c

  bss       = 0x0016a000-0x0017b0e8

  data      = 0x0017b0e8-0x0018c000

    stack   = 0x0018a000-0x0018c000

  init      = 0x0018c000-0x003ab000

  available = 0x003ab000-0x03eff000

  DMA Zone  = 0x03f00000-0x04000000

Hardware Trace Active and Enabled

Boot Mode: 1

Blackfin support (C) 2004-2009 Analog Devices, Inc.

Compiled for ADSP-BF518 Rev 0.0

Blackfin Linux support by http://blackfin.uclinux.org/

Processor Speed: 400 MHz core clock and 80 MHz System Clock

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

Data Cache Enabled for CPU0 (write-back)

...

...

bfin_mac: attached PHY driver [Generic PHY] (mii_bus:phy_addr=0:03, irq=-1,

mdc_clk=2500000Hz(mdc_div=15)@sclk=80MHz)

bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1

m25p80 spi0.1: unrecognized JEDEC id ffffff

m25p80 spi0.1: found UNKNOWN, expected m25p16

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0,

regs_base@ffc00500, dma channel@7

bfin-spi bfin-spi.1: Blackfin on-chip SPI Controller Driver, Version 1.0,

regs_base@ffc03400, dma channel@5

i2c /dev entries driver

 

Follow-ups

 

--- Graf Yang                                                2009-06-10 04:47:38

Fixed, it's caused by incorrect board resource define.

 

--- Graf Yang                                                2009-06-10 04:54:31

This board use spi0_sel2, not use spi0_sel1 for spi flash chip selector.

 

--- Mingquan Pan                                             2009-06-10 22:33:11

Yes, it is initialized now.

...

m25p80 spi0.2: m25p16 (2048 Kbytes)

Creating 2 MTD partitions on "m25p80":

0x00000000-0x00040000 : "bootloader(spi)"

0x00040000-0x00200000 : "linux kernel(spi)"

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller

...

 

So close.

 

 

 

    Files

    Changes

    Commits

    Dependencies

    Duplicates

    Associations

    Tags

 

File Name     File Type     File Size     Posted By

No Files Were Found

Attachments

    Outcomes