[#4662] boot up kernel configured with uart1 would have dump info

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[#4662] boot up kernel configured with uart1 would have dump info

Submitted By: Mingquan Pan

Open Date

2008-11-20 22:02:34     Close Date

2008-11-20 23:14:07

Priority:

Medium     Assignee:

Nobody

Status:

Closed     Fixed In Release:

N/A

Found In Release:

N/A     Release:

Category:

N/A     Board:

N/A

Processor:

N/A     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Assigned (Not Start)

Uboot version or rev.:

    Toolchain version or rev.:

Nov 11

App binary format:

N/A     

Summary: boot up kernel configured with uart1 would have dump info

Details:

 

boot up kernel configured with uart1 would have dump info, which shows conflict with other driver.( It looks it is not conflicting with i2c, for it is configured as module.)

 

the log:

 

root:/> dmesg

Linux version 2.6.28-rc2-ADI-2009R1-pre-svn5723 (test@uclinux50-bf537-ad9960-ad1836) (gcc version 4.1.2 (ADI svn)) #14 Fri Nov 21 10:35:53 CST 2008

console [early_BFuart0] enabled

early printk enabled on early_BFuart0

Warning: limiting memory to 56MB due to hardware anomaly 05000263

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

  fixedcode = 0x00000400-0x00000490

  text      = 0x00001000-0x0010a210

  rodata    = 0x0010a210-0x0015ab34

  bss       = 0x0015ab40-0x0016ab24

  data      = 0x0016ab24-0x0017a000

    stack   = 0x00178000-0x0017a000

  init      = 0x0017a000-0x004f3000

  available = 0x004f3000-0x037ff000

  DMA Zone  = 0x03f00000-0x04000000

Hardware Trace Active and Enabled

Reset caused by Software reset

Blackfin support (C) 2004-2008 Analog Devices, Inc.

Compiled for ADSP-BF537 Rev 0.2

Blackfin Linux support by   blackfin.uclinux.org/

Processor Speed: 500 MHz core clock and 100 MHz System Clock

boot memmap: 00000000004f3000 - 00000000037ff000 (usable)

On node 0 totalpages: 14335

free_area_init_node: node 0, pgdat 00177104, node_mem_map 004f8000

  DMA zone: 112 pages used for memmap

  DMA zone: 0 pages reserved

  DMA zone: 14223 pages, LIFO batch:3

  Normal zone: 0 pages used for memmap

  Movable zone: 0 pages used for memmap

NOMPU: setting up cplb tables for global access

Instruction Cache Enabled for CPU0

Data Cache Enabled for CPU0 (write-through)

Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 14223

Kernel command line: root=/dev/mtdblock0 rw earlyprintk=serial,uart0,7600 ip=10.100.4.50

Configuring Blackfin Priority Driven Interrupts

PID hash table entries: 256 (order: 8, 1024 bytes)

console handover: boot [early_BFuart0] -> real [ttyBF0]

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Kernel managed physical pages: 14335

Memory available: 51692k/65536k RAM, (3556k init code, 1060k kernel code, 448k data, 1024k dma, 7756k reserved)

Calibrating delay loop... 995.32 BogoMIPS (lpj=1990656)

Security Framework initialized

Mount-cache hash table entries: 512

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (15 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 48 KB (41 KB free)

PDA for CPU0 reserved at 0015bec0

net_namespace: 288 bytes

NET: Registered protocol family 16

Blackfin GPIO Controller

Blackfin DMA Controller

stamp_init(): registering device resources

Hardware Trace:

   0 Target : <0x000048a0> { _dump_stack + 0x0 }

     Source : <0x00006368> { _bfin_gpio_request + 0xa8 } CALL pcrel

   1 Target : <0x00006368> { _bfin_gpio_request + 0xa8 }

     Source : <0x0000632e> { _bfin_gpio_request + 0x6e } IF !CC JUMP

   2 Target : <0x000062fa> { _bfin_gpio_request + 0x3a }

     Source : <0x000062dc> { _bfin_gpio_request + 0x1c } IF !CC JUMP

   3 Target : <0x000062da> { _bfin_gpio_request + 0x1a }

     Source : <0x00005dd0> { _cmp_label + 0x30 } RTS

   4 Target : <0x00005dc8> { _cmp_label + 0x28 }

     Source : <0x00005dc0> { _cmp_label + 0x20 } IF !CC JUMP

   5 Target : <0x00005dba> { _cmp_label + 0x1a }

     Source : <0x00005dc4> { _cmp_label + 0x24 } IF CC JUMP

   6 Target : <0x00005dba> { _cmp_label + 0x1a }

     Source : <0x00005dc4> { _cmp_label + 0x24 } IF CC JUMP

   7 Target : <0x00005dba> { _cmp_label + 0x1a }

     Source : <0x00005dc4> { _cmp_label + 0x24 } IF CC JUMP

   8 Target : <0x00005dba> { _cmp_label + 0x1a }

     Source : <0x00005dc4> { _cmp_label + 0x24 } IF CC JUMP

   9 Target : <0x00005da0> { _cmp_label + 0x0 }

     Source : <0x000062d6> { _bfin_gpio_request + 0x16 } CALL pcrel

  10 Target : <0x000062c0> { _bfin_gpio_request + 0x0 }

     Source : <0x001886b2> { _stamp_init + 0x32 } CALL pcrel

  11 Target : <0x001886a8> { _stamp_init + 0x28 }

     Source : <0x0018f2ac> { _i2c_register_board_info + 0x9c } RTS

  12 Target : <0x0018f2a4> { _i2c_register_board_info + 0x94 }

     Source : <0x00109332> { _mutex_unlock + 0x22 } RTS

  13 Target : <0x00109310> { _mutex_unlock + 0x0 }

     Source : <0x0018f2a0> { _i2c_register_board_info + 0x90 } CALL pcrel

  14 Target : <0x0018f296> { _i2c_register_board_info + 0x86 }

     Source : <0x0018f23e> { _i2c_register_board_info + 0x2e } IF !CC JUMP

  15 Target : <0x0018f228> { _i2c_register_board_info + 0x18 }

     Source : <0x001093da> { _mutex_lock + 0x32 } RTS

Stack info:

SP: [0x037e1e84] <0x037e1e84> /* kernel dynamic memory */

FP: (0x037e1e94)

Memory from 0x037e1e80 to 037e2000

037e1e80:<0000e9c2>[0018f228]<0000636c> 0015ab64  00000003 (00000000)<001886a8> 0015ab64

037e1ea0:<001886b6> 00000000  00000000  00000000  00000000  00196510  0010abf0  0015b920

037e1ec0:<00001028> 00000000  00000000  00000000  ffffffff  037e1f04 <00088dc2> 001702bc

037e1ee0: 00165b2c  0016663c <00088e36> 037fb6a4  00000000  000000d2  0016663c  000000d0

037e1f00: 037e1f04  037e8f28  00000000  00000000  005997a0 <00088f9a> 0016663c  00165b2c

037e1f20: 00000000 <0006e278> 001702bc  00165b2c  00196510  037e1f58  005994a0  00598300

037e1f40: 00000000  00000000  0016663c  037e1f58 <0013d654><0006e4a0> 000000d2 <0006e4ae>

037e1f60: 001702bc  005994a0  00004000  00000000  00000000  037e1f98  7fffff00  00000001

037e1f80:<0002e316> 037e1f98  00000061 <0006e572> 001962f0  00598300  00003739  00000000

037e1fa0:<00180000><0002e372> 0016ebfc  001962f0  00000061  001702bc <0017a3b6> 00196344

037e1fc0: 001962f0  00000000  00000000  00000000  00000000  00000000  00000000  00000000

037e1fe0: 00000001 <0000145e> 00000000  00000000  00000000  00000000  ffffffff  00000006

037e2000: 037f74a0

Return addresses in stack:

    address : <0x0000e9c2> { _printk + 0x12 }

    address : <0x0018f228> { _i2c_register_board_info + 0x18 }

    address : <0x0000636c> { _bfin_gpio_request + 0xac }

   frame  1 : <0x001886a8> { _stamp_init + 0x28 }

    address : <0x001886b6> { _stamp_init + 0x36 }

    address : <0x00001028> { _do_one_initcall + 0x28 }

    address : <0x00088dc2> { _ida_get_new_above + 0x96 }

    address : <0x00088e36> { _ida_get_new_above + 0x10a }

    address : <0x00088f9a> { _ida_pre_get + 0xe }

    address : <0x0006e278> { _proc_register + 0x30 }

    address : <0x0013d654> /* kernel dynamic memory */

    address : <0x0006e4a0> { _create_proc_entry + 0x3c }

    address : <0x0006e4ae> { _create_proc_entry + 0x4a }

    address : <0x0002e316> { _register_irq_proc + 0x7e }

    address : <0x0006e572> { _proc_mkdir_mode + 0x2e }

    address : <0x00180000> { _setup_arch + 0x5a4 }

    address : <0x0002e372> { _init_irq_proc + 0x42 }

    address : <0x0017a3b6> { _kernel_init + 0x8a }

    address : <0x0000145e> { _kernel_thread_helper + 0x6 }

bfin-gpio: GPIO 3 is already reserved as Peripheral by bfin-uart !

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 2048 (order: 2, 16384 bytes)

TCP bind hash table entries: 2048 (order: 1, 8192 bytes)

TCP: Hash tables configured (established 2048 bind 2048)

TCP reno registered

NET: Registered protocol family 1

Setting up Blackfin MMR debugfs

msgmni has been set to 100

io scheduler noop registered

io scheduler anticipatory registered (default)

io scheduler cfq registered

Serial: Blackfin serial driver

bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

bfin-uart.1: ttyBF1 at MMIO 0xffc02000 (irq = 20) is a BFIN-UART

brd: module loaded

bfin_mac_mdio: probed

bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=19)@sclk=100MHz)

bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1

bfin-spi bfin-spi.0: Blackfin BF5xx on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@7

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

TCP cubic registered

NET: Registered protocol family 17

rtc-bfin rtc-bfin: setting system clock to 1970-01-01 00:13:34 UTC (814)

IP-Config: Guessing netmask 255.0.0.0

IP-Config: Complete:

     device=eth0, addr=10.100.4.50, mask=255.0.0.0, gw=255.255.255.255,

     host=10.100.4.50, domain=, nis-domain=(none),

     bootserver=255.255.255.255, rootserver=255.255.255.255, rootpath=

Freeing unused kernel memory: 3556k freed

dma_alloc_init: dma_page @ 0x004ef000 - 256 pages at 0x03f00000

PHY: 0:01 - Link is Up - 100/Full

 

config file is attached.

 

Follow-ups

 

--- Mingquan Pan                                             2008-11-20 23:14:07

It is found that the serial_uart port also conflicts with nand which is module

seleted. I would modify in test scripts.

 

 

 

    Files

    Changes

    Commits

    Dependencies

    Duplicates

    Associations

    Tags

 

File Name     File Type     File Size     Posted By

config.serial_uart    application/octet-stream    32437    Mingquan Pan

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