[#4415] Change timer frequency and bf561 trunk kernel with SMP patch will crash

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[#4415] Change timer frequency and bf561 trunk kernel with SMP patch will crash

Submitted By: Vivi Li

Open Date

2008-09-11 06:16:09     Close Date

2008-10-17 00:41:11

Priority:

Medium     Assignee:

Graf Yang

Status:

Closed     Fixed In Release:

N/A

Found In Release:

N/A     Release:

Category:

N/A     Board:

N/A

Processor:

N/A     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Fixed

Uboot version or rev.:

    Toolchain version or rev.:

App binary format:

N/A     

Summary: Change timer frequency and bf561 trunk kernel with SMP patch will crash

Details:

 

Change Timer frequency to 100Hz and 1000Hz, BF561 trunk kernel with SMP patch will crash.

 

--

Linux version 2.6.26.3-ADI-2009R1-pre-svn5273-dirty (test@uclinux65-561-SMP) (gcc version 4.1.2 (ADI svn)) #5 SMP Thu Sep 11 02:8

console [early_BFuart0] enabled

early printk enabled on early_BFuart0

Warning: limiting memory to 56MB due to hardware anomaly 05000263

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

  fixedcode = 0x00000400-0x00000490

  text      = 0x00001000-0x00108ab0

  rodata    = 0x00108ac0-0x00158998

  bss       = 0x001589a0-0x00168374

  data      = 0x00168380-0x0017c000

    stack   = 0x0017a000-0x0017c000

  init      = 0x0017c000-0x004c8000

  available = 0x004c8000-0x037ff000

  DMA Zone  = 0x03f00000-0x04000000

Hardware Trace Active and Enabled

Reset caused by Software reset

Blackfin support (C) 2004-2008 Analog Devices, Inc.

Compiled for ADSP-BF561 Rev 0.3

Warning: Compiled for Rev 3, but running on Rev 5

Blackfin Linux support by   blackfin.uclinux.org/

Processor Speed: 600 MHz core clock and 50 MHz System Clock

NOMPU: setting up cplb tables for global access

NOMPU: setting up cplb tables for global access

Instruction Cache Enabled for CPU0

Data Cache Enabled for CPU0 (write-through)

Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 14223

Kernel command line: root=/dev/mtdblock0 rw earlyprintk=serial,uart0,57600 console=ttyBF0,57600 ip=10.100.4.50:10.100.4.174:10.1f

Configuring Blackfin Priority Driven Interrupts

PID hash table entries: 256 (order: 8, 1024 bytes)

console handover: boot [early_BFuart0] -> real [ttyBF0]

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 51836k/65536k RAM, (3376k init code, 1054k kernel code, 462k data, 1024k dma, 7784k reserved)

Security Framework initialized

Mount-cache hash table entries: 512

CoreB bootstrap code to SRAM ff600000 via DMA.

Booting Core B.

Instruction Cache Enabled for CPU1

Data Cache Enabled for CPU1 (write-through)

PDA for CPU1 reserved at ff700000

Brought up 1 CPUs

SMP: Total of 1 processors activated (0.00 BogoMIPS).

Blackfin Scratchpad data SRAM: 4 KB

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (15 KB free)

Blackfin L1 Data A SRAM: 16 KB (15 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 16 KB (15 KB free)

Blackfin L1 Instruction SRAM: 16 KB (15 KB free)

Blackfin L2 SRAM: 128 KB (128 KB free)

PDA for CPU0 reserved at ffb00000

net_namespace: 200 bytes

NET: Registered protocol family 16

Blackfin GPIO Controller

Blackfin DMA Controller

ezkit_init(): registering device resources

NET: Registered protocol family 2

1176.37 BogoMIPS (lpj=5881856)

 

Double Fault

Kernel OOPS in progress

Deferred Exception context

CURRENT PROCESS:

COMM=events/0 PID=7

CPU = 0

invalid mm

return address: [0x00004f20]; contents of:

0x00004f00:  e100  38cc  e300  7f36  603e  2f92  6058  e14a

0x00004f10:  ff80  e140  0003  e10a  0008  b170  e121  03ff

0x00004f20: [9110] 0a08  1466  e140  0013  e100  397c  e300

0x00004f30:  7f21  605e  2f7d  6008  e140  0003  b170  e140

 

SEQUENCER STATUS:               Not tainted

SEQSTAT: 00060026  IPEND: 0480  SYSCFG: 0036

  HWERRCAUSE: 0x18

  EXCAUSE   : 0x26

  physical IVG7 asserted : <0x0000affc> { _evt_evt7 + 0x0 }

  physical IVG10 asserted : <0x0000b020> { _evt_evt10 + 0x0 }

  logical irq  42 mapped  : <0x00007208> { _timer_interrupt + 0x0 }

  logical irq  69 mapped  : <0x0000b6e8> { _ipi_handler + 0x0 }

RETE: <0x00000000> /* Maybe null pointer? */

RETN: <0x037c7e5c> /* kernel dynamic memory */

RETX: <0x00004f20> { _trap_c + 0x2b0 }

RETS: <0x0000a8f8> { _exception_to_level5 + 0xbc }

PC  : <0x00004f20> { _trap_c + 0x2b0 }

DCPLB_FAULT_ADDR: <0xe140fde1> /* kernel dynamic memory */

ICPLB_FAULT_ADDR: <0x0013e140> /* kernel dynamic memory */

 

PROCESSOR STATE:

R0 : 0003000b    R1 : 000003ff    R2 : 0000001f    R3 : 0016c5d4

R4 : 00000000    R5 : 0000100d    R6 : 0000ffbf    R7 : 0000002d

P0 : feb00000    P1 : 0000002d    P2 : ff800008    P3 : 00000000

P4 : 0015d7e0    P5 : 037c7f0c    FP : 037c8000    SP : 037c7d80

LB0: 000963dc    LT0: 000963dc    LC0: 00000000

LB1: 00095726    LT1: 0009571a    LC1: 00000000

B0 : 00000000    L0 : 00000000    M0 : 00000000    I0 : 0000000f

B1 : 00000000    L1 : 00000000    M1 : 00000000    I1 : 00000000

B2 : 00000000    L2 : 00000000    M2 : 00000000    I2 : 0011331c

B3 : 00000000    L3 : 00000000    M3 : 00000000    I3 : 0000001b

A0.w: 00001d68   A0.x: 00000000   A1.w: 00000870   A1.x: 00000000

USP : 037c8000  ASTAT: 00002022

 

Kernel panic - not syncing: Double Fault - unrecoverable event

 

CPU0: stopping

Hardware Trace:

   0 Target : <0x00004b74> { _dump_stack + 0x0 }

     Source : <0x0000b832> { _ipi_handler + 0x14a } CALL pcrel

   1 Target : <0x0000b832> { _ipi_handler + 0x14a }

     Source : <0x00014d86> { _printk + 0x16 } RTS

   2 Target : <0x00014d82> { _printk + 0x12 }

     Source : <0x0001564e> { _vprintk + 0x1d2 } RTS

   3 Target : <0x00015642> { _vprintk + 0x1c6 }

     Source : <0x0001561e> { _vprintk + 0x1a2 } IF !CC JUMP

   4 Target : <0x00015618> { _vprintk + 0x19c }

     Source : <0x00015720> { _vprintk + 0x2a4 } JUMP.S

   5 Target : <0x00015720> { _vprintk + 0x2a4 }

     Source : <0x00014d5c> { _wake_up_klogd + 0x28 } RTS

   6 Target : <0x00014d58> { _wake_up_klogd + 0x24 }

     Source : <0x00014d44> { _wake_up_klogd + 0x10 } IF !CC JUMP

   7 Target : <0x00014d34> { _wake_up_klogd + 0x0 }

     Source : <0x00015032> { _release_console_sem + 0x1d2 } JUMP.L

   8 Target : <0x0001502a> { _release_console_sem + 0x1ca }

     Source : <0x0001501e> { _release_console_sem + 0x1be } IF !CC JUMP

   9 Target : <0x0001501a> { _release_console_sem + 0x1ba }

     Source : <0x001088fa> { __spin_unlock_irqrestore + 0x3a } RTS

  10 Target : <0x001088f4> { __spin_unlock_irqrestore + 0x34 }

     Source : <0x001088d0> { __spin_unlock_irqrestore + 0x10 } IF !CC JUMP

  11 Target : <0x001088cc> { __spin_unlock_irqrestore + 0xc }

     Source : <0x0000be2a> { ___raw_spin_unlock_asm + 0x16 } RTS

  12 Target : <0x0000be28> { ___raw_spin_unlock_asm + 0x14 }

     Source : <0x0000bd24> { _put_core_lock + 0x18 } RTS

  13 Target : <0x0000bd0c> { _put_core_lock + 0x0 }

     Source : <0x0000bd9c> { _end_lock_coherent + 0x20 } JUMP.S

  14 Target : <0x0000bd7c> { _end_lock_coherent + 0x0 }

     Source : <0x0000be24> { ___raw_spin_unlock_asm + 0x10 } CALL pcrel

  15 Target : <0x0000be1c> { ___raw_spin_unlock_asm + 0x8 }

     Source : <0x0000bd0a> { _get_core_lock + 0x36 } RTS

Stack info:

SP: [0x037edd08] <0x037edd08> /* kernel dynamic memory */

FP: (0x037edd08)

Memory from 0x037edd00 to 037ee000

037edd00: 037edd08  0054eab4 [00000000]<0000b836> 0054e144  00000000  00000000  00000000

037edd20: 0000001f  00000000  0015a258  00000000  0016c5fc <0003270e> 037fe300  00000045

037edd40: 001589b0  00000000  00000000  00000045  037edf3c  0016c5f8  ffffffff  0017352c

037edd60:<00033a96> 0016f820  037fe300  0016f850  0016c5f8  0000000a  ffffffff  ffffffff

037edd80:<00005366> 00000045  001987f8  0016f820  00000000  001719c0  00000001  00000044

037edda0:<0000ae70> ffc00014  001446a0  0015d814  00000025  00000000  00000000  037ec000

037eddc0: 037b8f48  00015642  0000001f  00002026  00000000  00000000  00000000  00015642

037edde0:<00015720> 00000007  02003066  00095726  000963dc  0009571a  000963dc  00000000

037ede00: 00000000  000005e3  00000000  011d22cc  00000000  00000000  00000000  00000000

037ede20: 00000000  00000000  00000000  00000000  00000000  00000000  00000000  00000000

037ede40: 00000000  00000000  00000000  037ede48  037819e0  00000000  0016c5fc  0015d815

037ede60: 001446a0  0015d814  ffb00000  0015d7ec  feb00000  00000025  00000000  0016c5f8

037ede80: 037edf3c  0016c5d4  00000001  0000001f  0000ffbf  0000ffbf  feb00000  00000006

037edea0: 00000000  00000036  00000200  037edf3c  00171d0c  0000ffbf <00107924><00044a10>

037edec0: 00000008 <00044a10><00044a44> 00000040  037b1000 <00107924><000c92ac> 00002000

037edee0: 037edef4  037edef8  00000079  ffffffe0  00000001  000001c0  00000007  037ec000

037edf00: 037ec000 <00014d82> 00176fc0  00197fd8  037ec000  00000000  00000000  00000000

037edf20: 00000000  00197fd4  00000002  00000000  037edf3c <000b4c62> 001920f4  00000002

037edf40: 0000001f <0019214c> 001920f4  00000002 <000bc504> 00000000 <0018dadc><0017c486>

037edf60: 001920f4  00197fd8  00000002  00000003  00000000  00000000  00000001  33333333

037edf80: 00000000  00000000  00000000  00000000  00000000  00000000  00000000  00000000

037edfa0: 00000000  00000000  00000000  00000000  00000000  00000000  00000000  00000000

037edfc0: 00000000  00000000  00000000  00000003  00000000 <0000142e> 00000000  00000000

037edfe0: 00000000  00000000  00000000  00000000  00000000  00000000  ffffffff  00000006

037ee000: 037f6468

Return addresses in stack:

   frame  1 : <0x0000b836> { _ipi_handler + 0x14e }

    address : <0x0003270e> { _handle_IRQ_event + 0x4a }

    address : <0x00033a96> { _handle_simple_irq + 0x76 }

    address : <0x00005366> { _asm_do_IRQ + 0x56 }

    address : <0x0000ae70> { __common_int_entry + 0x70 }

    address : <0x00015720> { _vprintk + 0x2a4 }

    address : <0x00107924> { _mutex_unlock + 0x14 }

    address : <0x00044a10> { _kmem_cache_create + 0x280 }

    address : <0x00044a10> { _kmem_cache_create + 0x280 }

    address : <0x00044a44> { _kmem_cache_create + 0x2b4 }

    address : <0x00107924> { _mutex_unlock + 0x14 }

    address : <0x000c92ac> { _dev_init_scheduler + 0x2c }

    address : <0x00014d82> { _printk + 0x12 }

    address : <0x000b4c62> { _sock_register + 0x4a }

    address : <0x0019214c> { _inet_init + 0x58 }

    address : <0x000bc504> { _register_pernet_device + 0x44 }

    address : <0x0018dadc> { _init_pipe_fs + 0x30 }

    address : <0x0017c486> { _kernel_init + 0x11e }

    address : <0x0000142e> { _kernel_thread_helper + 0x6 }

--

 

Follow-ups

 

--- Graf Yang                                                2008-09-18 07:43:41

I can't duplicate this bug.

 

--- Graf Yang                                                2008-09-25 03:29:33

Many test have this crash message on test target with silicon 0.5.

It's because when CoreA clear the gptimer0's interrupt input, SICB_ISR1 also be

cleared, if CoreB has not checked SICB_ISR1, it lost the interrupt. CoreB will

not boot.

 

--- Vivi Li                                                  2008-10-17 00:41:11

This bug is ok now. Close it.

Thanks!

 

 

 

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