[#4181] add support to SMP kernel for module loading into L1

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[#4181] add support to SMP kernel for module loading into L1

Submitted By: Vivi Li

Open Date

2008-06-23 02:10:23     Close Date

2008-07-22 03:33:59

Priority:

Low     Assignee:

Graf Yang

Status:

Closed     Fixed In Release:

N/A

Found In Release:

N/A     Release:

Category:

N/A     Board:

N/A

Processor:

N/A     Silicon Revision:

Is this bug repeatable?:

Yes     Resolution:

Fixed

Uboot version or rev.:

    Toolchain version or rev.:

08r1.5-11

App binary format:

N/A     

Summary: add support to SMP kernel for module loading into L1

Details:

 

SMP kernel crashed when load module into L1.

Kernel module source file is located in uclinux-dist/testsuites/l1_module/hello.c

 

--

root:/> version

kernel:    Linux release 2.6.22.19-ADI-2008R1-svn4872, build #98 SMP Mon Jun 23 00:12:09 CST 2008

toolchain: bfin-uclinux-gcc release gcc version 4.1.2 (ADI svn)

user-dist: release svn-6801, build #789 Mon Jun 23 00:11:21 CST 2008

root:/>

root:/> insmod hello.ko

module hello: cannot relocate in L1: 7 (SMP kernel)<1>========Load module into L1 memory========

Jump to address 0 - 0x0fff

Kernel OOPS in progress

Defered Exception context

CURRENT PROCESS:

COMM=insmod PID=97

TEXT = 0x00280040-0x002ccd20        DATA = 0x002ccd24-0x002e0e44

BSS = 0x002e0e44-0x002e72b4  USER-STACK = 0x002eef74

 

return address: [0x00000000]; contents of:

 

SEQUENCER STATUS:               Not tainted

SEQSTAT: 0000202d  IPEND: 8030  SYSCFG: 0036

  HWERRCAUSE: 0x0

  EXCAUSE   : 0x2d

  physical IVG15 asserted : <0x0000a53c> { _evt_system_call + 0x0 }

  logical irq   6 mapped  : <0x00004148> { _timer_interrupt + 0x0 }

  logical irq  35 mapped  : <0x0009a46c> { _bfin_serial_dma_rx_int + 0x0 }

  logical irq  36 mapped  : <0x0009a980> { _bfin_serial_dma_tx_int + 0x0 }

  logical irq  69 mapped  : <0x0000abe4> { _ipi_handler + 0x0 }

  logical irq  82 mapped  : <0x000a2cec> { _smc_interrupt + 0x0 }

RETE: <0x00000000> /* Maybe null pointer? */

RETN: <0x03791e48> /* unknown address */

RETX: <0x00000000> /* Maybe null pointer? */

RETS: <0x037b20b4> { :hello:_hello_init + 0x20 }

PC  : <0x00000000> /* Maybe null pointer? */

DCPLB_FAULT_ADDR: <0x03791e44> /* unknown address */

ICPLB_FAULT_ADDR: <0x00000000> /* Maybe null pointer? */

 

PROCESSOR STATE:

R0 : 0000012c    R1 : 00000000    R2 : 0000001f    R3 : 2f71ff00

R4 : 037b266c    R5 : 03790000    R6 : 00000013    R7 : 037b2660

P0 : feb00000    P1 : 00148210    P2 : 00000000    P3 : 037b2660

P4 : 00761800    P5 : 00761924    FP : 00761940    SP : 03791d6c

LB0: 0008be6c    LT0: 0008be4c    LC0: 00000000

LB1: 0008b0ba    LT1: 0008b0ac    LC1: 00000000

B0 : 00000000    L0 : 00000000    M0 : 00000000    I0 : 00000000

B1 : 00000000    L1 : 00000000    M1 : 00000000    I1 : 00000000

B2 : 00000000    L2 : 00000000    M2 : 00000000    I2 : ffff8214

B3 : 00000000    L3 : 00000000    M3 : 00000000    I3 : 00000000

A0.w: 00000081   A0.x: 00000000   A1.w: 00000081   A1.x: 00000000

USP : 002eee84  ASTAT: 00003026

 

Hardware Trace:

   0 Target : <0x00004f4c> { _trap_c + 0x0 }

     Source : <0x00009d50> { _exception_to_level5 + 0xc0 }

   1 Target : <0x00009d10> { _exception_to_level5 + 0x80 }

     Source : <0x00009d06> { _exception_to_level5 + 0x76 }

   2 Target : <0x00009c90> { _exception_to_level5 + 0x0 }

     Source : <0x00009be8> { _ex_trap_c + 0x68 }

   3 Target : <0x00009bc2> { _ex_trap_c + 0x42 }

     Source : <0x00009bb8> { _ex_trap_c + 0x38 }

   4 Target : <0x00009b80> { _ex_trap_c + 0x0 }

     Source : <0x00009e1c> { _trap + 0x64 }

   5 Target : <0x00009dfc> { _trap + 0x44 }

     Source : <0x00009dec> { _trap + 0x34 }

   6 Target : <0x00009de4> { _trap + 0x2c }

     Source : <0x00009df0> { _trap + 0x38 }

   7 Target : <0x00009dee> { _trap + 0x36 }

     Source : <0x00009ddc> { _trap + 0x24 }

   8 Target : <0x00009db8> { _trap + 0x0 }

     Source : <0xffa00048> /* unknown address */

   9 Target : <0xffa00030> { __etext_l1 + 0x0 }

     Source : <0x037b20b2> { :hello:_hello_init + 0x1e }

  10 Target : <0x037b20aa> { :hello:_hello_init + 0x16 }

     Source : <0x00013152> { _printk + 0x16 }

  11 Target : <0x0001314e> { _printk + 0x12 }

     Source : <0x00012f88> { _vprintk + 0x234 }

  12 Target : <0x00012f7c> { _vprintk + 0x228 }

     Source : <0x0000a3de> { __common_int_entry + 0xf0 }

  13 Target : <0x0000a394> { __common_int_entry + 0xa6 }

     Source : <0x0000a38a> { __common_int_entry + 0x9c }

  14 Target : <0x0000a364> { __common_int_entry + 0x76 }

     Source : <0x0000a0f8> { _return_from_int + 0x58 }

  15 Target : <0x0000a0f8> { _return_from_int + 0x58 }

     Source : <0x0000a0ce> { _return_from_int + 0x2e }

Stack from 03791d4c:

        00000000 00009d54 ffb00028 ffb00028 ffb00024 00000000 002eee84 00148278

        00000000 00008030 0000202d 00000000 03791e48 00000000 00000000 037b20b4

        0000012c 00003026 0008b0ba 0008be6c 0008b0ac 0008be4c 00000000 00000000

        00000081 00000000 00000081 00000000 00000000 00000000 00000000 00000000

        00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

        00000000 ffff8214 00000000 00000000 002eee84 00761940 00761924 00761800

 

Call Trace:

[<0002db6c>] _sys_init_module+0xbc/0x1310

[<0003f71a>] _filp_close+0x3e/0x64

[<00009f6c>] _system_call+0x68/0xba

[<0002dab0>] _sys_init_module+0x0/0x1310

[<00008000>] _clear_dma_irqstat+0x6c/0x7c

[<00002000>] _arch_ptrace+0x23c/0x4a4

[<0000a5a0>] _evt_system_call+0x64/0x68

 

Modules linked in: hello

Kernel panic - not syncing: Kernel exception

CPU1: stopping

Hardware Trace:

Stack from 0378fbbc:

        00000000 0000ad32 004844e4 00000000 00000000 00000001 0000001f 00000001

        003ec83c 00000001 0378fe38 000304ba 037fea60 00000045 003ec84c 00000000

        00000000 00000045 003ec850 00000001 0016d2fc 00000000 00031790 0014a700

        037fea60 0014a72c 00000000 000055ac 0016d530 003eb00c 0000557c 0016d530

        003eb00c 0014a700 00000045 000055ac 0016d530 00485198 0000a35e ffc00014

        0000abc4 00001003 0000ffff 00000001 00000003 00000001 003f2adc 00009876

 

Call Trace:

[<00009876>] _dcache_invalidate+0x1e/0x34

[<0000aeb8>] _smp_call_function+0xbc/0x13c

[<00002060>] _arch_ptrace+0x29c/0x4a4

[<00032ff8>] _do_generic_mapping_read+0x254/0x46c

[<0008bba2>] _memcpy+0x3a/0x70

[<00032ff8>] _do_generic_mapping_read+0x254/0x46c

[<0008bba2>] _memcpy+0x3a/0x70

[<0000abc4>] _ipi_flush_icache+0x0/0x20

[<00001003>] _run_init_process+0x3/0x18

[<0000ffff>] _kick_process+0x47/0x50

[<000daa42>] _tcp_v4_send_ack+0x4e/0x164

[<000daa42>] _tcp_v4_send_ack+0x4e/0x164

[<0000abc4>] _ipi_flush_icache+0x0/0x20

[<0000af5c>] _smp_icache_flush_range_others+0x24/0x40

[<00003626>] _do_signal+0x656/0xddc

[<0006ab12>] _load_flat_binary+0x912/0xb18

[<0001ff7b>] _sys_setregid+0xb3/0x118

[<00003626>] _do_signal+0x656/0xddc

[<0000b339>] ___raw_spin_lock_asm+0x9/0x30

[<0006f000>] _render_sigset_t+0x88/0xbc

[<0006e6dc>] _proc_file_read+0x228/0x230

[<00006470>] _get_gpio_edge+0x10/0x5c

[<00060e40>] _bio_free+0x40/0x6c

[<00004ec9>] _panic_cplb_error+0x6d/0x9c

[<0004cce0>] ___locks_copy_lock+0x28/0x3c

[<0006e6d8>] _proc_file_read+0x224/0x230

[<00060000>] _cont_prepare_write+0x7c/0x238

[<00044460>] _search_binary_handler+0x98/0x204

[<0006a200>] _load_flat_binary+0x0/0xb18

[<00045996>] _do_execve+0x196/0x1d4

[<00009e44>] _kernel_execve+0x1c/0xdc

[<000215ea>] _____call_usermodehelper+0xfa/0x108

[<000017b6>] _kernel_thread_helper+0x6/0xc

 

--

 

Follow-ups

 

--- Graf Yang                                                2008-06-25 02:49:06

SMP kernel not support kernel module load in L1 memory currently.

 

--- Mike Frysinger                                           2008-06-25 07:43:02

then we make it a task to get it implemented ...

 

--- Graf Yang                                                2008-06-25 22:25:34

In SMP kernel, we now moved out most code from L1, except the bfin_reset(), it

is loaded at L1 of CoreA. When reboot is called in CoreB, currently

implementation was call smp_call_function() to let CoreA execute the

bfin_reset().

 

We also can load a similar function, maybe called bfin_reset_coreb(), into l1

of CoreB and execute it by CoreB.

 

What's your opinion about how to implement l1 module?

 

--- Mike Frysinger                                           2008-06-26 00:33:49

supporting code in L1 may be doable via a generated-on-the-fly jump table ...

the jump table would detect whether it can access things directly or it needs to

invoke the other core.  i dont think we could safely support data in L1.  but

perhaps all this overhead would negate the point of using L1 in the first place,

so perhaps we just mark it as "user-only".  either way, we'll need

documentation on limitations from running SMP.

 

so the only thing to do is fix this crash.  if the kernel errors on loading

into L1, then it shouldnt trigger a "jump to 0".  that means the error

handling is incorrect.

 

--- Graf Yang                                                2008-06-26 04:38:11

Ok, thanks! I have fixed this crash issue.

 

--- Vivi Li                                                  2008-07-22 03:33:59

Now when load module into L1, smp kernel give error info instead of crash.

Bellow it the log.

Close it. Thanks!

 

--

root:/> insmod hello.ko

module hello: cannot relocate in L1: 7 (SMP kernel)insmod: cannot insert

'hello.ko': Invalid module format (-1): Exec format error

root:/>

--

 

 

 

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