2011-09-26 02:02:16     How to change timeout value for watchdogd?

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2011-09-26 02:02:16     How to change timeout value for watchdogd?

Anwar Naseem (PAKISTAN)

Message: 103530   

Hi,

 

I am using BF532 with watchdog enabled in kernel. When uclinux loads , it shows

 

 

 

 

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

 

I want to change this value, may be 100sec or 300sec. Is it possible?

 

 

 

 

I have tried watchdogd -k 100 and watchdogd -w 100, but it doesnot work.

 

 

 

Actually I have to share the bus via bus grant mechanism for more than 20sec, and after 20sec uclinux restarts due to watchdogd daemon. I don't want to turn it off , I want to set it at 100 or 200sec.

 

Thanks in advance.

 

Anwar

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2011-09-26 02:39:59     Re: How to change timeout value for watchdogd?

Aaron Wu (CHINA)

Message: 103532   

 

What's the actual arguments are you passing to watchdog daemon, have you tried WDIOC_KEEPALIVE value larger than WDIOC_SETTIMEOUT value? like -k 200 -w 100.

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2011-09-26 02:51:38     Re: How to change timeout value for watchdogd?

Anwar Naseem (PAKISTAN)

Message: 103533   

 

Aaron Wu,  Yes I have tried that as well via two seperate commands watchdogd -k 200 and watchdogd -w 100. I will double check it.

 

Thanks,

 

Anwar

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2011-09-26 06:12:41     Re: How to change timeout value for watchdogd?

Aaron Wu (CHINA)

Message: 103541   

 

well, it's like this, a defaut watchdog deamon is running, keeps filling the watchdog so your action does not work. Try to disable this default deamon and things get work.

 

It's started in /etc/inittab. To disable it you may edit the Makefile in /user/watchdogd, deleting related lines.

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2011-09-27 03:55:00     Re: How to change timeout value for watchdogd?

Anwar Naseem (PAKISTAN)

Message: 103575   

 

Aaron,

 

I tried watchdogd -w 12 -k 6 -f -s in make file at /user/watchdogd, and the time was about 12secs.

 

But then I changed it to watchdogd -w 60 -k30  -f -s but it this case my uclkinux automatically restarts after 10-12 secs.

 

Any idae regarding the maximun limit for setting this time. (there must be some)

 

 

Anwar

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2011-09-27 04:43:00     Re: How to change timeout value for watchdogd?

Aaron Wu (CHINA)

Message: 103577   

 

the 32-bit watchdog timer counts downward every SCLK cycle, so yes there should be a maximum timeout value, consult the HRM and watchdog driver code bfin_wdt.c for details.

 

You may check if the software watchdog will help, softdog.c, however it's not that reliable and may fail to reboot your system from some situations that the hardware watchdog will recover from. But why you need a watchdog for so long a time, if you want something like a timer then make use of the existing timer facility in the kernel, with 64-bits voriables this may fufill your requirement. consult:   docs.blackfin.uclinux.org/doku.php?id=linux-kernel:timers

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2011-09-27 05:36:03     Re: How to change timeout value for watchdogd?

Rob Maris (GERMANY)

Message: 103578    Well, to respond to the reliability remark: In practical situations (where

a few thousand installed blackfin units out there were monitored) the

hardware watchdog isn't reliable enough. Failing situtions have occurred

where Uboot spuriously does not boot linux in a configuration where DHCP

is expected to succeed, while rebooting did. 100% reliability is given

only when U-boot initializes the blackfin watchdog right from the start...

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2011-09-29 12:51:16     Re: How to change timeout value for watchdogd?

Anwar Naseem (PAKISTAN)

Message: 103626   

 

Aaron

 

Actually my memory bus is shared, during my program flow, FPGA gets the controls of bus for about 5-8min. And during that time the adsp restarts due to watchdogd process.

 

I don't want to disbale the watchdog permanantly.

 

Anwar

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2011-09-29 23:18:39     Re: How to change timeout value for watchdogd?

Aaron Wu (CHINA)

Message: 103631   

 

Hi Anwar,

 

Could you start a new thread for this bus sharing issue. What's your detailed plan and work flow, now I can just assume that the blackfin work for a while after power on, then granting the memory bus to FPGA, after a while, like 5-8 minutes, the FPGA work is done and the watch dog of blackin timed out and system reboot, DRAM back to blackfin control, is this your design? please elaborate. And suppose there is no data transaction between the blackin and FPGA by sharing the momory so don't need to think about the memory consistency?

 

If you just want to leave enough time for the FPGA work may also think about connecting an IO from FPGA to blackin, once your FPGA work is done you assert the IO to trigger blackfin to restart.

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2011-09-30 06:03:27     Re: How to change timeout value for watchdogd?

Anwar Naseem (PAKISTAN)

Message: 103656   

 

Aaron ,

 

You have interpreted the flow well except that I donot want the watch dog to reset the adsp.

 

ADSP will run just like a while loop, and in between for 8-10min , the bus will be granted to FPGA and then bus will be back with adsp.

 

But watchdogd is not allowing to complete this flow as it restarts the ADSP after 20sec of bus grant to FPGA.

 

The problem is same as discussed before , so should new thred is recommended?

 

Thanks,

 

Anwar

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2011-09-30 07:40:22     Re: How to change timeout value for watchdogd?

Aaron Wu (CHINA)

Message: 103657   

 

Now the concern is how you plan to implement the bus granting/retriving? and how you handle the memory consistency between the two controllers. Anyway if you already have clear idea about this, you may check if either of the following will help: 1)RTC 2)system suspend. For details you can search the keywords in docs.blackfin.uclinux.org.

 

For the watchdog will time out and restart the system, you may try to disable the watchdog before the bus is granted to FPGA, and re-enable it when after the bus control is back.

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2011-09-30 08:00:51     Re: How to change timeout value for watchdogd?

Anwar Naseem (PAKISTAN)

Message: 103658   

 

Aaron,

 

Yes ,I have clear idea how to manage bus grant. I was also thinking of disabling the watchdogd deamon  before the bus is granted to FPGA, and re-enable it when after the bus control is back. But I think watchdogd deamon canot be used. So I have to write my own deamon may be using ioctl to disable or enable the watchdog.

 

 

 

Anwar

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